]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/System/startup_stm32l1xx_md.s
Add STM32L Discovery board project as a starting point to adapt to an RTOS demo.
[freertos] / FreeRTOS / Demo / CORTEX_STM32L152_Discovery_IAR / System / startup_stm32l1xx_md.s
diff --git a/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/System/startup_stm32l1xx_md.s b/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/System/startup_stm32l1xx_md.s
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+;/******************** (C) COPYRIGHT 2012 STMicroelectronics ********************\r
+;* File Name          : startup_stm32l1xx_md.s\r
+;* Author             : MCD Application Team\r
+;* Version            : V1.1.1\r
+;* Date               : 09-March-2012\r
+;* Description        : STM32L1xx Ultra Low Power Medium-density Devices vector \r
+;*                      table for EWARM toolchain.\r
+;*                      This module performs:\r
+;*                      - Set the initial SP\r
+;*                      - Set the initial PC == __iar_program_start,\r
+;*                      - Set the vector table entries with the exceptions ISR \r
+;*                        address.\r
+;*                      After Reset the Cortex-M3 processor is in Thread mode,\r
+;*                      priority is Privileged, and the Stack is set to Main.\r
+;********************************************************************************\r
+;* \r
+;* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");\r
+;* You may not use this file except in compliance with the License.\r
+;* You may obtain a copy of the License at:\r
+;* \r
+;*        http://www.st.com/software_license_agreement_liberty_v2\r
+;* \r
+;* Unless required by applicable law or agreed to in writing, software \r
+;* distributed under the License is distributed on an "AS IS" BASIS, \r
+;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
+;* See the License for the specific language governing permissions and\r
+;* limitations under the License.\r
+;* \r
+;*******************************************************************************/\r
+;\r
+;\r
+; The modules in this file are included in the libraries, and may be replaced\r
+; by any user-defined modules that define the PUBLIC symbol _program_start or\r
+; a user defined start symbol.\r
+; To override the cstartup defined in the library, simply add your modified\r
+; version to the workbench project.\r
+;\r
+; The vector table is normally located at address 0.\r
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.\r
+; The name "__vector_table" has special meaning for C-SPY:\r
+; it is where the SP start value is found, and the NVIC vector\r
+; table register (VTOR) is initialized to this address if != 0.\r
+;\r
+; Cortex-M version\r
+;\r
+\r
+        MODULE  ?cstartup\r
+\r
+        ;; Forward declaration of sections.\r
+        SECTION CSTACK:DATA:NOROOT(3)\r
+\r
+        SECTION .intvec:CODE:NOROOT(2)\r
+\r
+        EXTERN  __iar_program_start\r
+        EXTERN  SystemInit        \r
+        PUBLIC  __vector_table\r
+\r
+        DATA\r
+__vector_table\r
+        DCD     sfe(CSTACK)\r
+        DCD     Reset_Handler             ; Reset Handler\r
+\r
+        DCD     NMI_Handler               ; NMI Handler\r
+        DCD     HardFault_Handler         ; Hard Fault Handler\r
+        DCD     MemManage_Handler         ; MPU Fault Handler\r
+        DCD     BusFault_Handler          ; Bus Fault Handler\r
+        DCD     UsageFault_Handler        ; Usage Fault Handler\r
+        DCD     0                         ; Reserved\r
+        DCD     0                         ; Reserved\r
+        DCD     0                         ; Reserved\r
+        DCD     0                         ; Reserved\r
+        DCD     SVC_Handler               ; SVCall Handler\r
+        DCD     DebugMon_Handler          ; Debug Monitor Handler\r
+        DCD     0                         ; Reserved\r
+        DCD     PendSV_Handler            ; PendSV Handler\r
+        DCD     SysTick_Handler           ; SysTick Handler\r
+\r
+         ; External Interrupts\r
+        DCD     WWDG_IRQHandler           ; Window Watchdog\r
+        DCD     PVD_IRQHandler            ; PVD through EXTI Line detect\r
+        DCD     TAMPER_STAMP_IRQHandler   ; Tamper and Time Stamp\r
+        DCD     RTC_WKUP_IRQHandler       ; RTC Wakeup\r
+        DCD     FLASH_IRQHandler          ; FLASH\r
+        DCD     RCC_IRQHandler            ; RCC\r
+        DCD     EXTI0_IRQHandler          ; EXTI Line 0\r
+        DCD     EXTI1_IRQHandler          ; EXTI Line 1\r
+        DCD     EXTI2_IRQHandler          ; EXTI Line 2\r
+        DCD     EXTI3_IRQHandler          ; EXTI Line 3\r
+        DCD     EXTI4_IRQHandler          ; EXTI Line 4\r
+        DCD     DMA1_Channel1_IRQHandler  ; DMA1 Channel 1\r
+        DCD     DMA1_Channel2_IRQHandler  ; DMA1 Channel 2\r
+        DCD     DMA1_Channel3_IRQHandler  ; DMA1 Channel 3\r
+        DCD     DMA1_Channel4_IRQHandler  ; DMA1 Channel 4\r
+        DCD     DMA1_Channel5_IRQHandler  ; DMA1 Channel 5\r
+        DCD     DMA1_Channel6_IRQHandler  ; DMA1 Channel 6\r
+        DCD     DMA1_Channel7_IRQHandler  ; DMA1 Channel 7\r
+        DCD     ADC1_IRQHandler           ; ADC1\r
+        DCD     USB_HP_IRQHandler         ; USB High Priority\r
+        DCD     USB_LP_IRQHandler         ; USB Low  Priority\r
+        DCD     DAC_IRQHandler            ; DAC\r
+        DCD     COMP_IRQHandler           ; COMP through EXTI Line\r
+        DCD     EXTI9_5_IRQHandler        ; EXTI Line 9..5\r
+        DCD     LCD_IRQHandler            ; LCD\r
+        DCD     TIM9_IRQHandler           ; TIM9\r
+        DCD     TIM10_IRQHandler          ; TIM10\r
+        DCD     TIM11_IRQHandler          ; TIM11\r
+        DCD     TIM2_IRQHandler           ; TIM2\r
+        DCD     TIM3_IRQHandler           ; TIM3\r
+        DCD     TIM4_IRQHandler           ; TIM4\r
+        DCD     I2C1_EV_IRQHandler        ; I2C1 Event\r
+        DCD     I2C1_ER_IRQHandler        ; I2C1 Error\r
+        DCD     I2C2_EV_IRQHandler        ; I2C2 Event\r
+        DCD     I2C2_ER_IRQHandler        ; I2C2 Error\r
+        DCD     SPI1_IRQHandler           ; SPI1\r
+        DCD     SPI2_IRQHandler           ; SPI2\r
+        DCD     USART1_IRQHandler         ; USART1\r
+        DCD     USART2_IRQHandler         ; USART2\r
+        DCD     USART3_IRQHandler         ; USART3\r
+        DCD     EXTI15_10_IRQHandler      ; EXTI Line 15..10\r
+        DCD     RTC_Alarm_IRQHandler      ; RTC Alarm through EXTI Line\r
+        DCD     USB_FS_WKUP_IRQHandler    ; USB FS Wakeup from suspend\r
+        DCD     TIM6_IRQHandler           ; TIM6\r
+        DCD     TIM7_IRQHandler           ; TIM7\r
+        \r
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r
+;;\r
+;; Default interrupt handlers.\r
+;;\r
+        THUMB\r
+\r
+        PUBWEAK Reset_Handler\r
+        SECTION .text:CODE:REORDER(2)\r
+Reset_Handler\r
+        LDR     R0, =SystemInit\r
+        BLX     R0\r
+        LDR     R0, =__iar_program_start\r
+        BX      R0\r
+        \r
+        PUBWEAK NMI_Handler\r
+        SECTION .text:CODE:REORDER(1)\r
+NMI_Handler\r
+        B NMI_Handler\r
+        \r
+        \r
+        PUBWEAK HardFault_Handler\r
+        SECTION .text:CODE:REORDER(1)\r
+HardFault_Handler\r
+        B HardFault_Handler\r
+        \r
+        \r
+        PUBWEAK MemManage_Handler\r
+        SECTION .text:CODE:REORDER(1)\r
+MemManage_Handler\r
+        B MemManage_Handler\r
+        \r
+                \r
+        PUBWEAK BusFault_Handler\r
+        SECTION .text:CODE:REORDER(1)\r
+BusFault_Handler\r
+        B BusFault_Handler\r
+        \r
+        \r
+        PUBWEAK UsageFault_Handler\r
+        SECTION .text:CODE:REORDER(1)\r
+UsageFault_Handler\r
+        B UsageFault_Handler\r
+        \r
+        \r
+        PUBWEAK SVC_Handler\r
+        SECTION .text:CODE:REORDER(1)\r
+SVC_Handler\r
+        B SVC_Handler\r
+        \r
+        \r
+        PUBWEAK DebugMon_Handler\r
+        SECTION .text:CODE:REORDER(1)\r
+DebugMon_Handler\r
+        B DebugMon_Handler\r
+        \r
+        \r
+        PUBWEAK PendSV_Handler\r
+        SECTION .text:CODE:REORDER(1)\r
+PendSV_Handler\r
+        B PendSV_Handler\r
+        \r
+        \r
+        PUBWEAK SysTick_Handler\r
+        SECTION .text:CODE:REORDER(1)\r
+SysTick_Handler\r
+        B SysTick_Handler\r
+        \r
+        \r
+        PUBWEAK WWDG_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+WWDG_IRQHandler\r
+        B WWDG_IRQHandler\r
+        \r
+        \r
+        PUBWEAK PVD_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+PVD_IRQHandler\r
+        B PVD_IRQHandler\r
+        \r
+        \r
+        PUBWEAK TAMPER_STAMP_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+TAMPER_STAMP_IRQHandler\r
+        B TAMPER_STAMP_IRQHandler\r
+        \r
+        \r
+        PUBWEAK RTC_WKUP_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+RTC_WKUP_IRQHandler\r
+        B RTC_WKUP_IRQHandler\r
+        \r
+        \r
+        PUBWEAK FLASH_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+FLASH_IRQHandler\r
+        B FLASH_IRQHandler\r
+        \r
+        \r
+        PUBWEAK RCC_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+RCC_IRQHandler\r
+        B RCC_IRQHandler\r
+        \r
+        \r
+        PUBWEAK EXTI0_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+EXTI0_IRQHandler\r
+        B EXTI0_IRQHandler\r
+        \r
+        \r
+        PUBWEAK EXTI1_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+EXTI1_IRQHandler\r
+        B EXTI1_IRQHandler\r
+        \r
+        \r
+        PUBWEAK EXTI2_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+EXTI2_IRQHandler\r
+        B EXTI2_IRQHandler\r
+        \r
+        \r
+        PUBWEAK EXTI3_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+EXTI3_IRQHandler\r
+        B EXTI3_IRQHandler\r
+        \r
+        \r
+        PUBWEAK EXTI4_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+EXTI4_IRQHandler\r
+        B EXTI4_IRQHandler\r
+        \r
+        \r
+        PUBWEAK DMA1_Channel1_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+DMA1_Channel1_IRQHandler\r
+        B DMA1_Channel1_IRQHandler\r
+        \r
+        \r
+        PUBWEAK DMA1_Channel2_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+DMA1_Channel2_IRQHandler\r
+        B DMA1_Channel2_IRQHandler\r
+        \r
+        \r
+        PUBWEAK DMA1_Channel3_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+DMA1_Channel3_IRQHandler\r
+        B DMA1_Channel3_IRQHandler\r
+        \r
+        \r
+        PUBWEAK DMA1_Channel4_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+DMA1_Channel4_IRQHandler\r
+        B DMA1_Channel4_IRQHandler\r
+        \r
+        \r
+        PUBWEAK DMA1_Channel5_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+DMA1_Channel5_IRQHandler\r
+        B DMA1_Channel5_IRQHandler\r
+        \r
+        \r
+        PUBWEAK DMA1_Channel6_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+DMA1_Channel6_IRQHandler\r
+        B DMA1_Channel6_IRQHandler\r
+        \r
+        \r
+        PUBWEAK DMA1_Channel7_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+DMA1_Channel7_IRQHandler\r
+        B DMA1_Channel7_IRQHandler\r
+        \r
+        \r
+        PUBWEAK ADC1_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+ADC1_IRQHandler\r
+        B ADC1_IRQHandler\r
+        \r
+        \r
+        PUBWEAK USB_HP_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+USB_HP_IRQHandler\r
+        B USB_HP_IRQHandler\r
+        \r
+        \r
+        PUBWEAK USB_LP_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+USB_LP_IRQHandler\r
+        B USB_LP_IRQHandler\r
+        \r
+        \r
+        PUBWEAK DAC_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+DAC_IRQHandler\r
+        B DAC_IRQHandler\r
+        \r
+        \r
+        PUBWEAK COMP_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+COMP_IRQHandler\r
+        B COMP_IRQHandler\r
+        \r
+        \r
+        PUBWEAK EXTI9_5_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+EXTI9_5_IRQHandler\r
+        B EXTI9_5_IRQHandler\r
+        \r
+        \r
+        PUBWEAK LCD_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+LCD_IRQHandler\r
+        B LCD_IRQHandler\r
+        \r
+        \r
+        PUBWEAK TIM9_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+TIM9_IRQHandler\r
+        B TIM9_IRQHandler\r
+        \r
+        \r
+        PUBWEAK TIM10_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+TIM10_IRQHandler\r
+        B TIM10_IRQHandler\r
+        \r
+        \r
+        PUBWEAK TIM11_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+TIM11_IRQHandler\r
+        B TIM11_IRQHandler\r
+        \r
+        \r
+        PUBWEAK TIM2_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+TIM2_IRQHandler\r
+        B TIM2_IRQHandler\r
+        \r
+        \r
+        PUBWEAK TIM3_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+TIM3_IRQHandler\r
+        B TIM3_IRQHandler\r
+        \r
+        \r
+        PUBWEAK TIM4_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+TIM4_IRQHandler\r
+        B TIM4_IRQHandler\r
+        \r
+        \r
+        PUBWEAK I2C1_EV_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+I2C1_EV_IRQHandler\r
+        B I2C1_EV_IRQHandler\r
+        \r
+        \r
+        PUBWEAK I2C1_ER_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+I2C1_ER_IRQHandler\r
+        B I2C1_ER_IRQHandler\r
+        \r
+        \r
+        PUBWEAK I2C2_EV_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+I2C2_EV_IRQHandler\r
+        B I2C2_EV_IRQHandler\r
+        \r
+        \r
+        PUBWEAK I2C2_ER_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+I2C2_ER_IRQHandler\r
+        B I2C2_ER_IRQHandler\r
+        \r
+        \r
+        PUBWEAK SPI1_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+SPI1_IRQHandler\r
+        B SPI1_IRQHandler\r
+        \r
+        \r
+        PUBWEAK SPI2_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+SPI2_IRQHandler\r
+        B SPI2_IRQHandler\r
+        \r
+        \r
+        PUBWEAK USART1_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+USART1_IRQHandler\r
+        B USART1_IRQHandler\r
+        \r
+        \r
+        PUBWEAK USART2_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+USART2_IRQHandler\r
+        B USART2_IRQHandler\r
+        \r
+        \r
+        PUBWEAK USART3_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+USART3_IRQHandler\r
+        B USART3_IRQHandler\r
+        \r
+        \r
+        PUBWEAK EXTI15_10_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+EXTI15_10_IRQHandler\r
+        B EXTI15_10_IRQHandler\r
+        \r
+        \r
+        PUBWEAK RTC_Alarm_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+RTC_Alarm_IRQHandler\r
+        B RTC_Alarm_IRQHandler\r
+        \r
+        \r
+        PUBWEAK USB_FS_WKUP_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+USB_FS_WKUP_IRQHandler\r
+        B USB_FS_WKUP_IRQHandler\r
+        \r
+\r
+        PUBWEAK TIM6_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+TIM6_IRQHandler\r
+        B TIM6_IRQHandler\r
+        \r
+\r
+        PUBWEAK TIM7_IRQHandler\r
+        SECTION .text:CODE:REORDER(1)\r
+TIM7_IRQHandler\r
+        B TIM7_IRQHandler                \r
+\r
+        END\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r