commit 9f316c246baafa15c542a5aea81a94f26e3d6507

[freertos] / FreeRTOS / Demo / MB91460_Softune / SRC / Start91460.asm

diff --git a/FreeRTOS/Demo/MB91460_Softune/SRC/Start91460.asm b/FreeRTOS/Demo/MB91460_Softune/SRC/Start91460.asm
index 3e758b0321e4cfc065f72de2ccf380ff979f11ea..ce8c37d0614eda00461179f2116751ec03e96cfd 100644 (file)
--- a/FreeRTOS/Demo/MB91460_Softune/SRC/Start91460.asm
+++ b/FreeRTOS/Demo/MB91460_Softune/SRC/Start91460.asm
@@ -45,7 +45,7 @@
 ; 7.2     Check for CSV reset and set CSV\r
 ; 7.3     Check clock condition\r
 ; 7.4     Restore default settings after reset\r
-; 7.4.1   Disable clock modulator\r
+; 7.4.2   Disable clock modulator\r
 ; 7.4.2   Check if running on sub clock, change to main clock\r
 ; 7.4.3   Disable sub clock\r
 ; 7.4.4   Check if running on PLL, gear down PLL\r
@@ -1654,7 +1654,7 @@ NoSUBCSVreset:
 ; 7.4  Restore Default Settings after Reset\r
 ;=========================================================================================\r
 ;=========================================================================================\r
-; 7.4.1  Disable Clock Modulator\r
+; 7.4.2  Disable Clock Modulator\r
 ;=========================================================================================\r
         LDI             #0x04BB, R0             ; Clock Modulator Control Reg\r
         BANDL           #0xD, @R0               ; Disable Frequency modulation\r