+++ /dev/null
-/* --COPYRIGHT--,BSD\r
- * Copyright (c) 2014, Texas Instruments Incorporated\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- *\r
- * * Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- *\r
- * * Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- *\r
- * * Neither the name of Texas Instruments Incorporated nor the names of\r
- * its contributors may be used to endorse or promote products derived\r
- * from this software without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,\r
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR\r
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR\r
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,\r
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;\r
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR\r
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- * --/COPYRIGHT--*/\r
-//*****************************************************************************\r
-//\r
-// cs.c - Driver for the cs Module.\r
-//\r
-//*****************************************************************************\r
-\r
-//*****************************************************************************\r
-//\r
-//! \addtogroup cs_api cs\r
-//! @{\r
-//\r
-//*****************************************************************************\r
-\r
-#include "inc/hw_regaccess.h"\r
-#include "inc/hw_memmap.h"\r
-\r
-#if defined(__MSP430_HAS_CS__) || defined(__MSP430_HAS_SFR__)\r
-#include "cs.h"\r
-\r
-#include <assert.h>\r
-\r
-//*****************************************************************************\r
-//\r
-// The following value is used by CS_getACLK, CS_getSMCLK, CS_getMCLK to\r
-// determine the operating frequency based on the available DCO frequencies.\r
-//\r
-//*****************************************************************************\r
-#define CS_DCO_FREQ_1 1000000\r
-#define CS_DCO_FREQ_2 2670000\r
-#define CS_DCO_FREQ_3 3330000\r
-#define CS_DCO_FREQ_4 4000000\r
-#define CS_DCO_FREQ_5 5330000\r
-#define CS_DCO_FREQ_6 6670000\r
-#define CS_DCO_FREQ_7 8000000\r
-#define CS_DCO_FREQ_8 16000000\r
-#define CS_DCO_FREQ_9 20000000\r
-#define CS_DCO_FREQ_10 24000000\r
-\r
-//*****************************************************************************\r
-//\r
-// Internal very low power VLOCLK, low frequency oscillator with 10kHz typical\r
-// frequency, internal low-power oscillator MODCLK with 5 MHz typical\r
-// frequency and LFMODCLK is MODCLK divided by 128.\r
-//\r
-//*****************************************************************************\r
-#define CS_VLOCLK_FREQUENCY 10000\r
-#define CS_MODCLK_FREQUENCY 5000000\r
-#define CS_LFMODCLK_FREQUENCY 39062\r
-\r
-//*****************************************************************************\r
-//\r
-// The following value is used by CS_XT1Start, CS_bypassXT1,\r
-// CS_XT1StartWithTimeout, CS_bypassXT1WithTimeout to properly set the XTS\r
-// bit. This frequnecy threshold is specified in the User's Guide.\r
-//\r
-//*****************************************************************************\r
-#define LFXT_FREQUENCY_THRESHOLD 50000\r
-\r
-//*****************************************************************************\r
-//\r
-// LFXT crystal frequency. Should be set with\r
-// CS_externalClockSourceInit if LFXT is used and user intends to invoke\r
-// CS_getSMCLK, CS_getMCLK, CS_getACLK and\r
-// CS_turnOnLFXT, CS_LFXTByPass, CS_turnOnLFXTWithTimeout,\r
-// CS_LFXTByPassWithTimeout.\r
-//\r
-//*****************************************************************************\r
-static uint32_t privateLFXTClockFrequency = 0;\r
-\r
-//*****************************************************************************\r
-//\r
-// The HFXT crystal frequency. Should be set with\r
-// CS_externalClockSourceInit if HFXT is used and user intends to invoke\r
-// CS_getSMCLK, CS_getMCLK, CS_getACLK,\r
-// CS_turnOnLFXT, CS_LFXTByPass, CS_turnOnLFXTWithTimeout,\r
-// CS_LFXTByPassWithTimeout.\r
-//\r
-//*****************************************************************************\r
-static uint32_t privateHFXTClockFrequency = 0;\r
-\r
-static uint32_t privateCSASourceClockFromDCO(uint8_t clockdivider)\r
-{\r
- uint32_t CLKFrequency = 0;\r
-\r
- if(HWREG16(CS_BASE + OFS_CSCTL1) & DCORSEL)\r
- {\r
- switch(HWREG16(CS_BASE + OFS_CSCTL1) & DCOFSEL_7)\r
- {\r
- case DCOFSEL_0:\r
- CLKFrequency = CS_DCO_FREQ_1 / clockdivider;\r
- break;\r
- case DCOFSEL_1:\r
- CLKFrequency = CS_DCO_FREQ_5 / clockdivider;\r
- break;\r
- case DCOFSEL_2:\r
- CLKFrequency = CS_DCO_FREQ_6 / clockdivider;\r
- break;\r
- case DCOFSEL_3:\r
- CLKFrequency = CS_DCO_FREQ_7 / clockdivider;\r
- break;\r
- case DCOFSEL_4:\r
- CLKFrequency = CS_DCO_FREQ_8 / clockdivider;\r
- break;\r
- case DCOFSEL_5:\r
- CLKFrequency = CS_DCO_FREQ_9 / clockdivider;\r
- break;\r
- case DCOFSEL_6:\r
- case DCOFSEL_7:\r
- CLKFrequency = CS_DCO_FREQ_10 / clockdivider;\r
- break;\r
- default:\r
- CLKFrequency = 0;\r
- break;\r
- }\r
- }\r
- else\r
- {\r
- switch(HWREG16(CS_BASE + OFS_CSCTL1) & DCOFSEL_7)\r
- {\r
- case DCOFSEL_0:\r
- CLKFrequency = CS_DCO_FREQ_1 / clockdivider;\r
- break;\r
- case DCOFSEL_1:\r
- CLKFrequency = CS_DCO_FREQ_2 / clockdivider;\r
- break;\r
- case DCOFSEL_2:\r
- CLKFrequency = CS_DCO_FREQ_3 / clockdivider;\r
- break;\r
- case DCOFSEL_3:\r
- CLKFrequency = CS_DCO_FREQ_4 / clockdivider;\r
- break;\r
- case DCOFSEL_4:\r
- CLKFrequency = CS_DCO_FREQ_5 / clockdivider;\r
- break;\r
- case DCOFSEL_5:\r
- CLKFrequency = CS_DCO_FREQ_6 / clockdivider;\r
- break;\r
- case DCOFSEL_6:\r
- case DCOFSEL_7:\r
- CLKFrequency = CS_DCO_FREQ_7 / clockdivider;\r
- break;\r
- default:\r
- CLKFrequency = 0;\r
- break;\r
- }\r
- }\r
-\r
- return (CLKFrequency);\r
-}\r
-\r
-static uint32_t privateCSAComputeCLKFrequency(uint16_t CLKSource,\r
- uint16_t CLKSourceDivider)\r
-{\r
- uint32_t CLKFrequency = 0;\r
- uint8_t CLKSourceFrequencyDivider = 1;\r
- uint8_t i = 0;\r
-\r
- // Determine Frequency divider\r
- for(i = 0; i < CLKSourceDivider; i++)\r
- {\r
- CLKSourceFrequencyDivider *= 2;\r
- }\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- // Determine clock source based on CLKSource\r
- switch(CLKSource)\r
- {\r
- // If LFXT is selected as clock source\r
- case SELM__LFXTCLK:\r
- CLKFrequency = (privateLFXTClockFrequency /\r
- CLKSourceFrequencyDivider);\r
-\r
- //Check if LFXTOFFG is not set. If fault flag is set\r
- //VLO is used as source clock\r
- if(HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG)\r
- {\r
- HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);\r
- //Clear OFIFG fault flag\r
- HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;\r
-\r
- if(HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG)\r
- {\r
- CLKFrequency = CS_LFMODCLK_FREQUENCY;\r
- }\r
- }\r
- break;\r
-\r
- case SELM__VLOCLK:\r
- CLKFrequency =\r
- (CS_VLOCLK_FREQUENCY / CLKSourceFrequencyDivider);\r
- break;\r
-\r
- case SELM__LFMODOSC:\r
- CLKFrequency =\r
- (CS_LFMODCLK_FREQUENCY / CLKSourceFrequencyDivider);\r
-\r
- break;\r
-\r
- case SELM__DCOCLK:\r
- CLKFrequency =\r
- privateCSASourceClockFromDCO(CLKSourceFrequencyDivider);\r
-\r
- break;\r
-\r
- case SELM__MODOSC:\r
- CLKFrequency =\r
- (CS_MODCLK_FREQUENCY / CLKSourceFrequencyDivider);\r
-\r
- break;\r
-\r
- case SELM__HFXTCLK:\r
- CLKFrequency =\r
- (privateHFXTClockFrequency / CLKSourceFrequencyDivider);\r
-\r
- if(HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG)\r
- {\r
- HWREG8(CS_BASE + OFS_CSCTL5) &= ~HFXTOFFG;\r
- //Clear OFIFG fault flag\r
- HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;\r
- }\r
-\r
- if(HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG)\r
- {\r
- CLKFrequency = CS_MODCLK_FREQUENCY;\r
- }\r
- break;\r
- }\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-\r
- return (CLKFrequency);\r
-}\r
-\r
-void CS_setExternalClockSource(uint32_t LFXTCLK_frequency,\r
- uint32_t HFXTCLK_frequency)\r
-{\r
- privateLFXTClockFrequency = LFXTCLK_frequency;\r
- privateHFXTClockFrequency = HFXTCLK_frequency;\r
-}\r
-\r
-void CS_initClockSignal(uint8_t selectedClockSignal,\r
- uint16_t clockSource,\r
- uint16_t clockSourceDivider)\r
-{\r
- //Verify User has selected a valid Frequency divider\r
- assert(\r
- (CS_CLOCK_DIVIDER_1 == clockSourceDivider) ||\r
- (CS_CLOCK_DIVIDER_2 == clockSourceDivider) ||\r
- (CS_CLOCK_DIVIDER_4 == clockSourceDivider) ||\r
- (CS_CLOCK_DIVIDER_8 == clockSourceDivider) ||\r
- (CS_CLOCK_DIVIDER_16 == clockSourceDivider) ||\r
- (CS_CLOCK_DIVIDER_32 == clockSourceDivider)\r
- );\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- switch(selectedClockSignal)\r
- {\r
- case CS_ACLK:\r
- assert(\r
- (CS_LFXTCLK_SELECT == clockSource) ||\r
- (CS_VLOCLK_SELECT == clockSource) ||\r
- (CS_LFMODOSC_SELECT == clockSource)\r
- );\r
-\r
- clockSourceDivider = clockSourceDivider << 8;\r
- clockSource = clockSource << 8;\r
-\r
- HWREG16(CS_BASE + OFS_CSCTL2) &= ~(SELA_7);\r
- HWREG16(CS_BASE + OFS_CSCTL2) |= (clockSource);\r
- HWREG16(CS_BASE + OFS_CSCTL3) &= ~(DIVA0 + DIVA1 + DIVA2);\r
- HWREG16(CS_BASE + OFS_CSCTL3) |= clockSourceDivider;\r
- break;\r
- case CS_SMCLK:\r
- assert(\r
- (CS_LFXTCLK_SELECT == clockSource) ||\r
- (CS_VLOCLK_SELECT == clockSource) ||\r
- (CS_DCOCLK_SELECT == clockSource) ||\r
- (CS_HFXTCLK_SELECT == clockSource) ||\r
- (CS_LFMODOSC_SELECT == clockSource)||\r
- (CS_MODOSC_SELECT == clockSource)\r
- );\r
-\r
- clockSource = clockSource << 4;\r
- clockSourceDivider = clockSourceDivider << 4;\r
-\r
- HWREG16(CS_BASE + OFS_CSCTL2) &= ~(SELS_7);\r
- HWREG16(CS_BASE + OFS_CSCTL2) |= clockSource;\r
- HWREG16(CS_BASE + OFS_CSCTL3) &= ~(DIVS0 + DIVS1 + DIVS2);\r
- HWREG16(CS_BASE + OFS_CSCTL3) |= clockSourceDivider;\r
- break;\r
- case CS_MCLK:\r
- assert(\r
- (CS_LFXTCLK_SELECT == clockSource) ||\r
- (CS_VLOCLK_SELECT == clockSource) ||\r
- (CS_DCOCLK_SELECT == clockSource) ||\r
- (CS_HFXTCLK_SELECT == clockSource) ||\r
- (CS_LFMODOSC_SELECT == clockSource)||\r
- (CS_MODOSC_SELECT == clockSource)\r
- );\r
-\r
- HWREG16(CS_BASE + OFS_CSCTL2) &= ~(SELM_7);\r
- HWREG16(CS_BASE + OFS_CSCTL2) |= clockSource;\r
- HWREG16(CS_BASE + OFS_CSCTL3) &= ~(DIVM0 + DIVM1 + DIVM2);\r
- HWREG16(CS_BASE + OFS_CSCTL3) |= clockSourceDivider;\r
- break;\r
- }\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-}\r
-\r
-void CS_turnOnLFXT(uint16_t lfxtdrive)\r
-{\r
- assert(privateLFXTClockFrequency != 0);\r
-\r
- assert((lfxtdrive == CS_LFXT_DRIVE_0) ||\r
- (lfxtdrive == CS_LFXT_DRIVE_1) ||\r
- (lfxtdrive == CS_LFXT_DRIVE_2) ||\r
- (lfxtdrive == CS_LFXT_DRIVE_3));\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- //Switch ON LFXT oscillator\r
- HWREG16(CS_BASE + OFS_CSCTL4) &= ~LFXTOFF;\r
-\r
- //Highest drive setting for LFXTstartup\r
- HWREG16(CS_BASE + OFS_CSCTL4_L) |= LFXTDRIVE1_L + LFXTDRIVE0_L;\r
-\r
- HWREG16(CS_BASE + OFS_CSCTL4) &= ~LFXTBYPASS;\r
-\r
- //Wait for Crystal to stabilize\r
- while(HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG)\r
- {\r
- //Clear OSC flaut Flags fault flags\r
- HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);\r
-\r
- //Clear OFIFG fault flag\r
- HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;\r
- }\r
-\r
- //set requested Drive mode\r
- HWREG16(CS_BASE + OFS_CSCTL4) = (HWREG16(CS_BASE + OFS_CSCTL4) &\r
- ~(LFXTDRIVE_3)\r
- ) |\r
- (lfxtdrive);\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-}\r
-\r
-void CS_bypassLFXT(void)\r
-{\r
- //Verify user has set frequency of LFXT with SetExternalClockSource\r
- assert(privateLFXTClockFrequency != 0);\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- assert(privateLFXTClockFrequency < LFXT_FREQUENCY_THRESHOLD);\r
-\r
- // Set LFXT in LF mode Switch off LFXT oscillator and enable BYPASS mode\r
- HWREG16(CS_BASE + OFS_CSCTL4) |= (LFXTBYPASS + LFXTOFF);\r
-\r
- //Wait until LFXT stabilizes\r
- while(HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG)\r
- {\r
- //Clear OSC flaut Flags fault flags\r
- HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);\r
-\r
- // Clear the global fault flag. In case the LFXT caused the global fault\r
- // flag to get set this will clear the global error condition. If any\r
- // error condition persists, global flag will get again.\r
- HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;\r
- }\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-}\r
-\r
-bool CS_turnOnLFXTWithTimeout(uint16_t lfxtdrive,\r
- uint32_t timeout)\r
-{\r
- assert(privateLFXTClockFrequency != 0);\r
-\r
- assert((lfxtdrive == CS_LFXT_DRIVE_0) ||\r
- (lfxtdrive == CS_LFXT_DRIVE_1) ||\r
- (lfxtdrive == CS_LFXT_DRIVE_2) ||\r
- (lfxtdrive == CS_LFXT_DRIVE_3));\r
-\r
- assert(timeout > 0);\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- //Switch ON LFXT oscillator\r
- HWREG16(CS_BASE + OFS_CSCTL4) &= ~LFXTOFF;\r
-\r
- //Highest drive setting for LFXTstartup\r
- HWREG16(CS_BASE + OFS_CSCTL4_L) |= LFXTDRIVE1_L + LFXTDRIVE0_L;\r
-\r
- HWREG16(CS_BASE + OFS_CSCTL4) &= ~LFXTBYPASS;\r
-\r
- while((HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG) && --timeout)\r
- {\r
- //Clear OSC fault Flags fault flags\r
- HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);\r
-\r
- // Clear the global fault flag. In case the LFXT caused the global fault\r
- // flag to get set this will clear the global error condition. If any\r
- // error condition persists, global flag will get again.\r
- HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;\r
- }\r
-\r
- if(timeout)\r
- {\r
- //set requested Drive mode\r
- HWREG16(CS_BASE + OFS_CSCTL4) = (HWREG16(CS_BASE + OFS_CSCTL4) &\r
- ~(LFXTDRIVE_3)\r
- ) |\r
- (lfxtdrive);\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
- return (STATUS_SUCCESS);\r
- }\r
- else\r
- {\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
- return (STATUS_FAIL);\r
- }\r
-}\r
-\r
-bool CS_bypassLFXTWithTimeout(uint32_t timeout)\r
-{\r
- assert(privateLFXTClockFrequency != 0);\r
-\r
- assert(privateLFXTClockFrequency < LFXT_FREQUENCY_THRESHOLD);\r
-\r
- assert(timeout > 0);\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- // Set LFXT in LF mode Switch off LFXT oscillator and enable BYPASS mode\r
- HWREG16(CS_BASE + OFS_CSCTL4) |= (LFXTBYPASS + LFXTOFF);\r
-\r
- while((HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG) && --timeout)\r
- {\r
- //Clear OSC fault Flags fault flags\r
- HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);\r
-\r
- // Clear the global fault flag. In case the LFXT caused the global fault\r
- // flag to get set this will clear the global error condition. If any\r
- // error condition persists, global flag will get again.\r
- HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;\r
- }\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-\r
- if(timeout)\r
- {\r
- return (STATUS_SUCCESS);\r
- }\r
- else\r
- {\r
- return (STATUS_FAIL);\r
- }\r
-}\r
-\r
-void CS_turnOffLFXT(void)\r
-{\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- //Switch off LFXT oscillator\r
- HWREG16(CS_BASE + OFS_CSCTL4) |= LFXTOFF;\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-}\r
-\r
-void CS_turnOnHFXT(uint16_t hfxtdrive)\r
-{\r
- assert(privateHFXTClockFrequency != 0);\r
-\r
- assert((hfxtdrive == CS_HFXT_DRIVE_4MHZ_8MHZ) ||\r
- (hfxtdrive == CS_HFXT_DRIVE_8MHZ_16MHZ) ||\r
- (hfxtdrive == CS_HFXT_DRIVE_16MHZ_24MHZ)||\r
- (hfxtdrive == CS_HFXT_DRIVE_24MHZ_32MHZ));\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- // Switch ON HFXT oscillator\r
- HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFXTOFF;\r
-\r
- //Disable HFXTBYPASS mode and Switch on HFXT oscillator\r
- HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFXTBYPASS;\r
-\r
- //If HFFrequency is 16MHz or above\r
- if(privateHFXTClockFrequency > 16000000)\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_3;\r
- }\r
- //If HFFrequency is between 8MHz and 16MHz\r
- else if(privateHFXTClockFrequency > 8000000)\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_2;\r
- }\r
- //If HFFrequency is between 0MHz and 4MHz\r
- else if(privateHFXTClockFrequency < 4000000)\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_0;\r
- }\r
- //If HFFrequency is between 4MHz and 8MHz\r
- else\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_1;\r
- }\r
-\r
- while(HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG)\r
- {\r
- //Clear OSC flaut Flags\r
- HWREG8(CS_BASE + OFS_CSCTL5) &= ~(HFXTOFFG);\r
-\r
- //Clear OFIFG fault flag\r
- HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;\r
- }\r
-\r
- HWREG16(CS_BASE + OFS_CSCTL4) = (HWREG16(CS_BASE + OFS_CSCTL4) &\r
- ~(CS_HFXT_DRIVE_24MHZ_32MHZ)\r
- ) |\r
- (hfxtdrive);\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-}\r
-\r
-void CS_bypassHFXT(void)\r
-{\r
- //Verify user has initialized value of HFXTClock\r
- assert(privateHFXTClockFrequency != 0);\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- //Switch off HFXT oscillator and set it to BYPASS mode\r
- HWREG16(CS_BASE + OFS_CSCTL4) |= (HFXTBYPASS + HFXTOFF);\r
-\r
- //Set correct HFFREQ bit for FR58xx/FR59xx devices\r
-\r
- //If HFFrequency is 16MHz or above\r
- if(privateHFXTClockFrequency > 16000000)\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_3;\r
- }\r
- //If HFFrequency is between 8MHz and 16MHz\r
- else if(privateHFXTClockFrequency > 8000000)\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_2;\r
- }\r
- //If HFFrequency is between 0MHz and 4MHz\r
- else if(privateHFXTClockFrequency < 4000000)\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_0;\r
- }\r
- //If HFFrequency is between 4MHz and 8MHz\r
- else\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_1;\r
- }\r
-\r
- while(HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG)\r
- {\r
- //Clear OSC fault Flags\r
- HWREG8(CS_BASE + OFS_CSCTL5) &= ~(HFXTOFFG);\r
-\r
- //Clear OFIFG fault flag\r
- HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;\r
- }\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-}\r
-\r
-bool CS_turnOnHFXTWithTimeout(uint16_t hfxtdrive,\r
- uint32_t timeout)\r
-{\r
- //Verify user has initialized value of HFXTClock\r
- assert(privateHFXTClockFrequency != 0);\r
-\r
- assert(timeout > 0);\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- //Switch on HFXT oscillator\r
- HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFXTOFF;\r
-\r
- // Disable HFXTBYPASS mode\r
- HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFXTBYPASS;\r
-\r
- //Set correct HFFREQ bit for FR58xx/FR59xx devices based\r
- //on HFXTClockFrequency\r
-\r
- //If HFFrequency is 16MHz or above\r
- if(privateHFXTClockFrequency > 16000000)\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_3;\r
- }\r
- //If HFFrequency is between 8MHz and 16MHz\r
- else if(privateHFXTClockFrequency > 8000000)\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_2;\r
- }\r
- //If HFFrequency is between 0MHz and 4MHz\r
- else if(privateHFXTClockFrequency < 4000000)\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_0;\r
- }\r
- //If HFFrequency is between 4MHz and 8MHz\r
- else\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_1;\r
- }\r
-\r
- while((HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) && --timeout)\r
- {\r
- //Clear OSC fault Flags fault flags\r
- HWREG8(CS_BASE + OFS_CSCTL5) &= ~(HFXTOFFG);\r
-\r
- // Clear the global fault flag. In case the LFXT caused the global fault\r
- // flag to get set this will clear the global error condition. If any\r
- // error condition persists, global flag will get again.\r
- HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;\r
- }\r
-\r
- if(timeout)\r
- {\r
- //Set drive strength for HFXT\r
- HWREG16(CS_BASE + OFS_CSCTL4) = (HWREG16(CS_BASE + OFS_CSCTL4) &\r
- ~(CS_HFXT_DRIVE_24MHZ_32MHZ)\r
- ) |\r
- (hfxtdrive);\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
- return (STATUS_SUCCESS);\r
- }\r
- else\r
- {\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
- return (STATUS_FAIL);\r
- }\r
-}\r
-\r
-bool CS_bypassHFXTWithTimeout(uint32_t timeout)\r
-{\r
- //Verify user has initialized value of HFXTClock\r
- assert(privateHFXTClockFrequency != 0);\r
-\r
- assert(timeout > 0);\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- //If HFFrequency is 16MHz or above\r
- if(privateHFXTClockFrequency > 16000000)\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_3;\r
- }\r
- //If HFFrequency is between 8MHz and 16MHz\r
- else if(privateHFXTClockFrequency > 8000000)\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_2;\r
- }\r
- //If HFFrequency is between 0MHz and 4MHz\r
- else if(privateHFXTClockFrequency < 4000000)\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_0;\r
- }\r
- //If HFFrequency is between 4MHz and 8MHz\r
- else\r
- {\r
- HWREG16(CS_BASE + OFS_CSCTL4) = HFFREQ_1;\r
- }\r
-\r
- //Switch off HFXT oscillator and enable BYPASS mode\r
- HWREG16(CS_BASE + OFS_CSCTL4) |= (HFXTBYPASS + HFXTOFF);\r
-\r
- while((HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) && --timeout)\r
- {\r
- //Clear OSC fault Flags fault flags\r
- HWREG8(CS_BASE + OFS_CSCTL5) &= ~(HFXTOFFG);\r
-\r
- // Clear the global fault flag. In case the LFXT caused the global fault\r
- // flag to get set this will clear the global error condition. If any\r
- // error condition persists, global flag will get again.\r
- HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;\r
- }\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-\r
- if(timeout)\r
- {\r
- return (STATUS_SUCCESS);\r
- }\r
- else\r
- {\r
- return (STATUS_FAIL);\r
- }\r
-}\r
-\r
-void CS_turnOffHFXT(void)\r
-{\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- //Switch off HFXT oscillator\r
- HWREG16(CS_BASE + OFS_CSCTL4) |= HFXTOFF;\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-}\r
-\r
-void CS_enableClockRequest(uint8_t selectClock)\r
-{\r
- assert(\r
- (CS_ACLK == selectClock)||\r
- (CS_SMCLK == selectClock)||\r
- (CS_MCLK == selectClock)||\r
- (CS_MODOSC == selectClock));\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- HWREG8(CS_BASE + OFS_CSCTL6) |= selectClock;\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-}\r
-\r
-void CS_disableClockRequest(uint8_t selectClock)\r
-{\r
- assert(\r
- (CS_ACLK == selectClock)||\r
- (CS_SMCLK == selectClock)||\r
- (CS_MCLK == selectClock)||\r
- (CS_MODOSC == selectClock));\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- HWREG8(CS_BASE + OFS_CSCTL6) &= ~selectClock;\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-}\r
-\r
-uint8_t CS_getFaultFlagStatus(uint8_t mask)\r
-{\r
- assert(\r
- (CS_HFXTOFFG == mask)||\r
- (CS_LFXTOFFG == mask)\r
- );\r
- return (HWREG8(CS_BASE + OFS_CSCTL5) & mask);\r
-}\r
-\r
-void CS_clearFaultFlag(uint8_t mask)\r
-{\r
- assert(\r
- (CS_HFXTOFFG == mask)||\r
- (CS_LFXTOFFG == mask)\r
- );\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- HWREG8(CS_BASE + OFS_CSCTL5) &= ~mask;\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-}\r
-\r
-uint32_t CS_getACLK(void)\r
-{\r
- //Find ACLK source\r
- uint16_t ACLKSource = (HWREG16(CS_BASE + OFS_CSCTL2) & SELA_7);\r
- ACLKSource = ACLKSource >> 8;\r
-\r
- //Find ACLK frequency divider\r
- uint16_t ACLKSourceDivider = HWREG16(CS_BASE + OFS_CSCTL3) & SELA_7;\r
- ACLKSourceDivider = ACLKSourceDivider >> 8;\r
-\r
- return (privateCSAComputeCLKFrequency(\r
- ACLKSource,\r
- ACLKSourceDivider));\r
-}\r
-\r
-uint32_t CS_getSMCLK(void)\r
-{\r
- //Find SMCLK source\r
- uint16_t SMCLKSource = HWREG8(CS_BASE + OFS_CSCTL2) & SELS_7;\r
-\r
- SMCLKSource = SMCLKSource >> 4;\r
-\r
- //Find SMCLK frequency divider\r
- uint16_t SMCLKSourceDivider = HWREG16(CS_BASE + OFS_CSCTL3) & SELS_7;\r
- SMCLKSourceDivider = SMCLKSourceDivider >> 4;\r
-\r
- return (privateCSAComputeCLKFrequency(\r
- SMCLKSource,\r
- SMCLKSourceDivider)\r
- );\r
-}\r
-\r
-uint32_t CS_getMCLK(void)\r
-{\r
- //Find MCLK source\r
- uint16_t MCLKSource = (HWREG16(CS_BASE + OFS_CSCTL2) & SELM_7);\r
- //Find MCLK frequency divider\r
- uint16_t MCLKSourceDivider = HWREG16(CS_BASE + OFS_CSCTL3) & SELM_7;\r
-\r
- return (privateCSAComputeCLKFrequency(\r
- MCLKSource,\r
- MCLKSourceDivider)\r
- );\r
-}\r
-\r
-void CS_turnOffVLO(void)\r
-{\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- HWREG16(CS_BASE + OFS_CSCTL4) |= VLOOFF;\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-}\r
-\r
-uint16_t CS_clearAllOscFlagsWithTimeout(uint32_t timeout)\r
-{\r
- assert(timeout > 0);\r
-\r
- // Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- do\r
- {\r
- // Clear all osc fault flags\r
- HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG + HFXTOFFG);\r
-\r
- // Clear the global osc fault flag.\r
- HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;\r
-\r
- // Check LFXT fault flags\r
- }\r
- while((HWREG8(SFR_BASE + OFS_SFRIFG1) & OFIFG) && --timeout);\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-\r
- return (HWREG8(CS_BASE + OFS_CSCTL5) & (LFXTOFFG + HFXTOFFG));\r
-}\r
-\r
-void CS_setDCOFreq(uint16_t dcorsel,\r
- uint16_t dcofsel)\r
-{\r
- assert(\r
- (dcofsel == CS_DCOFSEL_0)||\r
- (dcofsel == CS_DCOFSEL_1)||\r
- (dcofsel == CS_DCOFSEL_2)||\r
- (dcofsel == CS_DCOFSEL_3)||\r
- (dcofsel == CS_DCOFSEL_4)||\r
- (dcofsel == CS_DCOFSEL_5)||\r
- (dcofsel == CS_DCOFSEL_6)\r
- );\r
-\r
- //Verify user has selected a valid DCO Frequency Range option\r
- assert(\r
- (dcorsel == CS_DCORSEL_0)||\r
- (dcorsel == CS_DCORSEL_1));\r
-\r
- //Unlock CS control register\r
- HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;\r
-\r
- // Set user's frequency selection for DCO\r
- HWREG16(CS_BASE + OFS_CSCTL1) = (dcorsel + dcofsel);\r
-\r
- // Lock CS control register\r
- HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;\r
-}\r
-\r
-#endif\r
-//*****************************************************************************\r
-//\r
-//! Close the doxygen group for cs_api\r
-//! @}\r
-//\r
-//*****************************************************************************\r
projects / freertos / blobdiff