--- /dev/null
+#################################################################\r
+# Makefile generated by Xilinx Platform Studio \r
+# Project:C:\E\Dev\FreeRTOS\WorkingCopy\Demo\MicroBlaze_Spartan-6_EthernetLite\PlatformStudioProject\system.xmp\r
+#\r
+# WARNING : This file will be re-generated every time a command\r
+# to run a make target is invoked. So, any changes made to this \r
+# file manually, will be lost when make is invoked next. \r
+#################################################################\r
+\r
+# Name of the Microprocessor system\r
+# The hardware specification of the system is in file :\r
+# C:\E\Dev\FreeRTOS\WorkingCopy\Demo\MicroBlaze_Spartan-6_EthernetLite\PlatformStudioProject\system.mhs\r
+\r
+include system_incl.make\r
+\r
+#################################################################\r
+# PHONY TARGETS\r
+#################################################################\r
+.PHONY: dummy\r
+.PHONY: netlistclean\r
+.PHONY: bitsclean\r
+.PHONY: simclean\r
+.PHONY: exporttosdk\r
+\r
+#################################################################\r
+# EXTERNAL TARGETS\r
+#################################################################\r
+all:\r
+ @echo "Makefile to build a Microprocessor system :"\r
+ @echo "Run make with any of the following targets"\r
+ @echo " "\r
+ @echo " netlist : Generates the netlist for the given MHS "\r
+ @echo " bits : Runs Implementation tools to generate the bitstream"\r
+ @echo " exporttosdk: Export files to SDK"\r
+ @echo " "\r
+ @echo " init_bram: Initializes bitstream with BRAM data"\r
+ @echo " ace : Generate ace file from bitstream and elf"\r
+ @echo " download : Downloads the bitstream onto the board"\r
+ @echo " "\r
+ @echo " sim : Generates HDL simulation models and runs simulator for chosen simulation mode"\r
+ @echo " simmodel : Generates HDL simulation models for chosen simulation mode"\r
+ @echo " "\r
+ @echo " netlistclean: Deletes netlist"\r
+ @echo " bitsclean: Deletes bit, ncd, bmm files"\r
+ @echo " hwclean : Deletes implementation dir"\r
+ @echo " simclean : Deletes simulation dir"\r
+ @echo " clean : Deletes all generated files/directories"\r
+ @echo " "\r
+\r
+bits: $(SYSTEM_BIT)\r
+\r
+ace: $(SYSTEM_ACE)\r
+\r
+exporttosdk: $(SYSTEM_HW_HANDOFF_DEP)\r
+\r
+netlist: $(POSTSYN_NETLIST)\r
+\r
+download: $(DOWNLOAD_BIT) dummy\r
+ @echo "*********************************************"\r
+ @echo "Downloading Bitstream onto the target board"\r
+ @echo "*********************************************"\r
+ impact -batch etc/download.cmd\r
+\r
+init_bram: $(DOWNLOAD_BIT)\r
+\r
+sim: $(DEFAULT_SIM_SCRIPT)\r
+ cd simulation/behavioral & \\r
+ system_fuse.cmd\r
+ cd simulation/behavioral & \\r
+ start /B $(SIM_CMD) -gui -tclbatch system_setup.tcl\r
+\r
+simmodel: $(DEFAULT_SIM_SCRIPT)\r
+\r
+behavioral_model: $(BEHAVIORAL_SIM_SCRIPT)\r
+\r
+structural_model: $(STRUCTURAL_SIM_SCRIPT)\r
+\r
+clean: hwclean simclean\r
+ rm -f _impact.cmd\r
+\r
+hwclean: netlistclean bitsclean\r
+ rm -rf implementation synthesis xst hdl\r
+ rm -rf xst.srp $(SYSTEM).srp\r
+ rm -f __xps/ise/_xmsgs/bitinit.xmsgs\r
+\r
+netlistclean:\r
+ rm -f $(POSTSYN_NETLIST)\r
+ rm -f platgen.log\r
+ rm -f __xps/ise/_xmsgs/platgen.xmsgs\r
+ rm -f $(BMM_FILE)\r
+\r
+bitsclean:\r
+ rm -f $(SYSTEM_BIT)\r
+ rm -f implementation/$(SYSTEM).ncd\r
+ rm -f implementation/$(SYSTEM)_bd.bmm \r
+ rm -f implementation/$(SYSTEM)_map.ncd \r
+ rm -f implementation/download.bit \r
+ rm -f __xps/$(SYSTEM)_routed\r
+\r
+simclean: \r
+ rm -rf simulation/behavioral\r
+ rm -f simgen.log\r
+ rm -f __xps/ise/_xmsgs/simgen.xmsgs\r
+\r
+#################################################################\r
+# BOOTLOOP ELF FILES\r
+#################################################################\r
+\r
+\r
+$(MICROBLAZE_0_BOOTLOOP): $(MICROBLAZE_BOOTLOOP_LE)\r
+ IF NOT EXIST "$(BOOTLOOP_DIR)" @mkdir "$(BOOTLOOP_DIR)"\r
+ cp -f $(MICROBLAZE_BOOTLOOP_LE) $(MICROBLAZE_0_BOOTLOOP)\r
+\r
+#################################################################\r
+# HARDWARE IMPLEMENTATION FLOW\r
+#################################################################\r
+\r
+\r
+$(BMM_FILE) \\r
+$(WRAPPER_NGC_FILES): $(MHSFILE) __xps/platgen.opt \\r
+ $(CORE_STATE_DEVELOPMENT_FILES)\r
+ @echo "****************************************************"\r
+ @echo "Creating system netlist for hardware specification.."\r
+ @echo "****************************************************"\r
+ platgen $(PLATGEN_OPTIONS) $(MHSFILE)\r
+\r
+$(POSTSYN_NETLIST): $(WRAPPER_NGC_FILES)\r
+ @echo "Running synthesis..."\r
+ cd synthesis & synthesis.cmd\r
+\r
+__xps/$(SYSTEM)_routed: $(FPGA_IMP_DEPENDENCY)\r
+ @echo "*********************************************"\r
+ @echo "Running Xilinx Implementation tools.."\r
+ @echo "*********************************************"\r
+ @cp -f $(UCF_FILE) implementation/$(SYSTEM).ucf\r
+ @cp -f etc/fast_runtime.opt implementation/xflow.opt\r
+ xflow -wd implementation -p $(DEVICE) -implement xflow.opt $(SYSTEM).ngc\r
+ touch __xps/$(SYSTEM)_routed\r
+\r
+$(SYSTEM_BIT): __xps/$(SYSTEM)_routed $(BITGEN_UT_FILE)\r
+ xilperl $(XILINX_EDK_DIR)/data/fpga_impl/observe_par.pl $(OBSERVE_PAR_OPTIONS) implementation/$(SYSTEM).par\r
+ @echo "*********************************************"\r
+ @echo "Running Bitgen.."\r
+ @echo "*********************************************"\r
+ @cp -f $(BITGEN_UT_FILE) implementation/bitgen.ut\r
+ cd implementation & bitgen -w -f bitgen.ut $(SYSTEM) & cd ..\r
+\r
+$(DOWNLOAD_BIT): $(SYSTEM_BIT) $(BRAMINIT_ELF_IMP_FILES) __xps/bitinit.opt\r
+ @cp -f implementation/$(SYSTEM)_bd.bmm .\r
+ @echo "*********************************************"\r
+ @echo "Initializing BRAM contents of the bitstream"\r
+ @echo "*********************************************"\r
+ bitinit -p $(DEVICE) $(MHSFILE) $(SEARCHPATHOPT) $(BRAMINIT_ELF_IMP_FILE_ARGS) \\r
+ -bt $(SYSTEM_BIT) -o $(DOWNLOAD_BIT)\r
+ @rm -f $(SYSTEM)_bd.bmm\r
+\r
+$(SYSTEM_ACE):\r
+ @echo "In order to generate ace file, you must have:-"\r
+ @echo "- exactly one processor."\r
+ @echo "- opb_mdm, if using microblaze."\r
+\r
+#################################################################\r
+# EXPORT_TO_SDK FLOW\r
+#################################################################\r
+\r
+$(SYSTEM_HW_HANDOFF): $(MHSFILE) __xps/platgen.opt\r
+ IF NOT EXIST "$(SDK_EXPORT_DIR)" @mkdir "$(SDK_EXPORT_DIR)"\r
+ psf2Edward -inp $(SYSTEM).xmp -exit_on_error -edwver 1.2 -xml $(SDK_EXPORT_DIR)/$(SYSTEM).xml $(GLOBAL_SEARCHPATHOPT)\r
+ xdsgen -inp $(SYSTEM).xmp -report $(SDK_EXPORT_DIR)/$(SYSTEM).html $(GLOBAL_SEARCHPATHOPT) -make_docs_local\r
+\r
+$(SYSTEM_HW_HANDOFF_BIT): $(SYSTEM_BIT)\r
+ @rm -rf $(SYSTEM_HW_HANDOFF_BIT)\r
+ @cp -f $(SYSTEM_BIT) $(SDK_EXPORT_DIR)\r
+\r
+$(SYSTEM_HW_HANDOFF_BMM): implementation/$(SYSTEM)_bd.bmm\r
+ @rm -rf $(SYSTEM_HW_HANDOFF_BMM)\r
+ @cp -f implementation/$(SYSTEM)_bd.bmm $(SDK_EXPORT_DIR)\r
+\r
+#################################################################\r
+# SIMULATION FLOW\r
+#################################################################\r
+\r
+\r
+################## BEHAVIORAL SIMULATION ##################\r
+\r
+$(BEHAVIORAL_SIM_SCRIPT): $(MHSFILE) __xps/simgen.opt \\r
+ $(BRAMINIT_ELF_SIM_FILES)\r
+ @echo "*********************************************"\r
+ @echo "Creating behavioral simulation models..."\r
+ @echo "*********************************************"\r
+ simgen $(SIMGEN_OPTIONS) -m behavioral $(MHSFILE)\r
+\r
+################## STRUCTURAL SIMULATION ##################\r
+\r
+$(STRUCTURAL_SIM_SCRIPT): $(WRAPPER_NGC_FILES) __xps/simgen.opt \\r
+ $(BRAMINIT_ELF_SIM_FILES)\r
+ @echo "*********************************************"\r
+ @echo "Creating structural simulation models..."\r
+ @echo "*********************************************"\r
+ simgen $(SIMGEN_OPTIONS) -sd implementation -m structural $(MHSFILE)\r
+\r
+\r
+################## TIMING SIMULATION ##################\r
+\r
+implementation/$(SYSTEM).ncd: __xps/$(SYSTEM)_routed\r
+\r
+$(TIMING_SIM_SCRIPT): implementation/$(SYSTEM).ncd __xps/simgen.opt \\r
+ $(BRAMINIT_ELF_SIM_FILES)\r
+ @echo "*********************************************"\r
+ @echo "Creating timing simulation models..."\r
+ @echo "*********************************************"\r
+ simgen $(SIMGEN_OPTIONS) -sd implementation -m timing $(MHSFILE)\r
+\r
+dummy:\r
+ @echo ""\r
+\r
projects / freertos / blobdiff