Fix spelling mistakes copied and pasted into a couple of RISC-V demo main.c files.

[freertos] / FreeRTOS / Demo / RISC-V_RV32M1_Vega_GCC_Eclipse / projects / RTOSDemo_ri5cy / full_demo / RegTest.S

diff --git a/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/RegTest.S b/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/RegTest.S
index ca2c01b88f0b4242af588ce6c278d667057fb62d..64ed555456c4207b43be090856d51b0c20b388a8 100644 (file)
--- a/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/RegTest.S
+++ b/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/RegTest.S
@@ -48,7 +48,7 @@
  * main_full.c.\r
  */\r
 \r
-.align( 8 )\r
+.align( 4 )\r
 vRegTest1Implementation:\r
 \r
        /* Fill the additional registers with known values. */\r
@@ -193,12 +193,12 @@ reg1_error_loop:
        ebreak\r
        jal reg1_error_loop\r
 \r
-.align( 16 )\r
+.align( 4 )\r
 ulRegTest1LoopCounterConst: .word ulRegTest1LoopCounter\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
-.align( 8 )\r
+.align( 4 )\r
 vRegTest2Implementation:\r
 \r
        /* Fill the additional registers with known values. */\r
@@ -340,7 +340,7 @@ reg2_error_loop:
        ebreak\r
        jal reg2_error_loop\r
 \r
-.align( 16 )\r
+.align( 4 )\r
 ulRegTest2LoopCounterConst: .word ulRegTest2LoopCounter\r
 \r
 \r