Update the pin mux setup on the Vega board demo to enable the LED.

[freertos] / FreeRTOS / Demo / RISC-V_RV32M1_Vega_GCC_Eclipse / projects / RTOSDemo_ri5cy / main.c

diff --git a/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/main.c b/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/main.c
index add731b456026bb82ca3e0f4f10aa2083d30ab08..2bf2661cf7c44eb1228d08ec4d6e2b09b6428504 100644 (file)
--- a/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/main.c
+++ b/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/main.c
@@ -226,4 +226,27 @@ void vTaskSwitchContext( void );
        /* Clear LPIT0 interrupt. */\r
        LPIT0->MSR = 1U;\r
 }\r
+/*-----------------------------------------------------------*/\r
+\r
+/* At the time of writing, interrupt nesting is not supported, so do not use\r
+the default SystemIrqHandler() implementation as that enables interrupts.  A\r
+version that does not enable interrupts is provided below.  THIS INTERRUPT\r
+HANDLER IS SPECIFIC TO THE VEGA BOARD WHICH DOES NOT INCLUDE A CLINT! */\r
+void SystemIrqHandler( uint32_t mcause )\r
+{\r
+uint32_t ulInterruptNumber;\r
+typedef void ( * irq_handler_t )( void );\r
+extern const irq_handler_t isrTable[];\r
+\r
+       ulInterruptNumber = mcause & 0x1FUL;\r
+\r
+       /* Clear pending flag in EVENT unit .*/\r
+       EVENT_UNIT->INTPTPENDCLEAR = ( 1U << ulInterruptNumber );\r
+\r
+       /* Read back to make sure write finished. */\r
+       (void)(EVENT_UNIT->INTPTPENDCLEAR);\r
+\r
+       /* Now call the real irq handler for ulInterruptNumber */\r
+       isrTable[ ulInterruptNumber ]();\r
+}\r
 \r