Update version number to 8.1.1 for patch release that re-enables mutexes to be given...

[freertos] / FreeRTOS / Demo / WizNET_DEMO_GCC_ARM7 / i2c.c

diff --git a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.c b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.c
index 238f189da1f086c984cba17e2f660613ecfec096..a6d83d898a64548e2dc4eb1896a80760442eae45 100644 (file)
--- a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.c
+++ b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.c
@@ -1,5 +1,6 @@
 /*\r
-    FreeRTOS V7.5.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+    FreeRTOS V8.1.1 - Copyright (C) 2014 Real Time Engineers Ltd. \r
+    All rights reserved\r
 \r
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
 \r
@@ -23,10 +24,10 @@
     the terms of the GNU General Public License (version 2) as published by the\r
     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
 \r
-    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
-    >>! a combined work that includes FreeRTOS without being obliged to provide\r
-    >>! the source code for proprietary components outside of the FreeRTOS\r
-    >>! kernel.\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
 \r
     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
@@ -91,7 +92,7 @@
 #define i2cI2C_VIC_ENABLE              ( ( unsigned long ) 0x0020 )\r
 \r
 /* Misc constants. */\r
-#define i2cNO_BLOCK                            ( ( portTickType ) 0 )\r
+#define i2cNO_BLOCK                            ( ( TickType_t ) 0 )\r
 #define i2cQUEUE_LENGTH                        ( ( unsigned char ) 5 )\r
 #define i2cEXTRA_MESSAGES              ( ( unsigned char ) 2 )\r
 #define i2cREAD_TX_LEN                 ( ( unsigned long ) 2 )\r
@@ -107,19 +108,19 @@ can be left free. */
 static xI2CMessage xTxMessages[ i2cQUEUE_LENGTH + i2cEXTRA_MESSAGES ];\r
 \r
 /* Function in the ARM part of the code used to create the queues. */\r
-extern void vI2CISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxTxMessages, unsigned long **ppulBusFree );\r
+extern void vI2CISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, QueueHandle_t *pxTxMessages, unsigned long **ppulBusFree );\r
 \r
 /* Index to the next free message in the xTxMessages array. */\r
 unsigned long ulNextFreeMessage = ( unsigned long ) 0;\r
 \r
 /* Queue of messages that are waiting transmission. */\r
-static xQueueHandle xMessagesForTx;\r
+static QueueHandle_t xMessagesForTx;\r
 \r
 /* Flag to indicate the state of the I2C ISR state machine. */\r
 static unsigned long *pulBusFree;\r
 \r
 /*-----------------------------------------------------------*/\r
-void i2cMessage( const unsigned char * const pucMessage, long lMessageLength, unsigned char ucSlaveAddress, unsigned short usBufferAddress, unsigned long ulDirection, xSemaphoreHandle xMessageCompleteSemaphore, portTickType xBlockTime )\r
+void i2cMessage( const unsigned char * const pucMessage, long lMessageLength, unsigned char ucSlaveAddress, unsigned short usBufferAddress, unsigned long ulDirection, SemaphoreHandle_t xMessageCompleteSemaphore, TickType_t xBlockTime )\r
 {\r
 extern volatile xI2CMessage *pxCurrentMessage;\r
 xI2CMessage *pxNextFreeMessage;\r