Replace the static prvSetupTimerInterrupt() function in the Cortex-M port layers...

[freertos] / FreeRTOS / Source / portable / GCC / ARM_CM0 / port.c

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c
index 18a668b9b64c57dfa18bd2da429dd75a8300df98..15a5795efc2eca81852d56690c9052451f254fff 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c
@@ -71,9 +71,11 @@ debugger. */
 #endif\r
 \r
 /*\r
- * Setup the timer to generate the tick interrupts.\r
+ * Setup the timer to generate the tick interrupts.  The implementation in this\r
+ * file is weak to allow application writers to change the timer used to\r
+ * generate the tick interrupt.\r
  */\r
-static void prvSetupTimerInterrupt( void );\r
+void vPortSetupTimerInterrupt( void );\r
 \r
 /*\r
  * Exception handlers.\r
@@ -217,7 +219,7 @@ BaseType_t xPortStartScheduler( void )
 \r
        /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
        here already. */\r
-       prvSetupTimerInterrupt();\r
+       vPortSetupTimerInterrupt();\r
 \r
        /* Initialise the critical nesting count ready for the first task. */\r
        uxCriticalNesting = 0;\r
@@ -370,7 +372,7 @@ uint32_t ulPreviousMask;
  * Setup the systick timer to generate the tick interrupts at the required\r
  * frequency.\r
  */\r
-void prvSetupTimerInterrupt( void )\r
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void )\r
 {\r
        /* Calculate the constants required to configure the tick interrupt. */\r
        #if( configUSE_TICKLESS_IDLE == 1 )\r