/*\r
- FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ FreeRTOS V9.0.1 - Copyright (C) 2017 Real Time Engineers Ltd.\r
+ All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that has become a de facto standard. *\r
- * *\r
- * Help yourself get started quickly and support the FreeRTOS *\r
- * project by purchasing a FreeRTOS tutorial book, reference *\r
- * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
- * *\r
- * Thank you! *\r
- * *\r
- ***************************************************************************\r
-\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
\r
- >>! NOTE: The modification to the GPL is included to allow you to distribute\r
- >>! a combined work that includes FreeRTOS without being obliged to provide\r
- >>! the source code for proprietary components outside of the FreeRTOS\r
- >>! kernel.\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
link: http://www.freertos.org/a00114.html\r
\r
- 1 tab == 4 spaces!\r
-\r
***************************************************************************\r
* *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
* *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
* *\r
***************************************************************************\r
\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
- license and Real Time Engineers Ltd. contact details.\r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and middleware.\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
\r
http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
engineered and independently SIL3 certified version for use in safety and\r
#include "task.h"\r
\r
/* Constants required to manipulate the NVIC. */\r
-#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )\r
-#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )\r
-#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )\r
-#define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )\r
+#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )\r
+#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )\r
+#define portNVIC_SYSTICK_CURRENT_VALUE ( ( volatile uint32_t * ) 0xe000e018 )\r
+#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 )\r
+#define portNVIC_SYSPRI2 ( ( volatile uint32_t *) 0xe000ed20 )\r
#define portNVIC_SYSTICK_CLK 0x00000004\r
#define portNVIC_SYSTICK_INT 0x00000002\r
#define portNVIC_SYSTICK_ENABLE 0x00000001\r
/* Constants required to set up the initial stack. */\r
#define portINITIAL_XPSR ( 0x01000000 )\r
\r
+/* Let the user override the pre-loading of the initial LR with the address of\r
+prvTaskExitError() in case it messes up unwinding of the stack in the\r
+debugger. */\r
+#ifdef configTASK_RETURN_ADDRESS\r
+ #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS\r
+#else\r
+ #define portTASK_RETURN_ADDRESS prvTaskExitError\r
+#endif\r
+\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
-static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
\r
/*\r
* Setup the timer to generate the tick interrupts.\r
*/\r
void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
void xPortSysTickHandler( void );\r
-void vPortSVCHandler( void ) __attribute__ (( naked ));\r
+void vPortSVCHandler( void );\r
\r
/*\r
* Start first task is a separate function so it can be tested in isolation.\r
*/\r
static void vPortStartFirstTask( void ) __attribute__ (( naked ));\r
\r
+/*\r
+ * Used to catch tasks that attempt to return from their implementing function.\r
+ */\r
+static void prvTaskExitError( void );\r
+\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
- pxTopOfStack -= 6; /* LR, R12, R3..R1 */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */\r
+ pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack -= 8; /* R11..R4. */\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
+static void prvTaskExitError( void )\r
+{\r
+ /* A function that implements a task must not exit or attempt to return to\r
+ its caller as there is nothing to return to. If a task wants to exit it\r
+ should instead call vTaskDelete( NULL ).\r
+\r
+ Artificially force an assert() to be triggered if configASSERT() is\r
+ defined, then stop here so application writers can catch the error. */\r
+ configASSERT( uxCriticalNesting == ~0UL );\r
+ portDISABLE_INTERRUPTS();\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
void vPortSVCHandler( void )\r
{\r
- __asm volatile (\r
- " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */\r
- " ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */\r
- " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
- " add r0, r0, #16 \n" /* Move to the high registers. */\r
- " ldmia r0!, {r4-r7} \n" /* Pop the high registers. */\r
- " mov r8, r4 \n"\r
- " mov r9, r5 \n"\r
- " mov r10, r6 \n"\r
- " mov r11, r7 \n"\r
- " \n"\r
- " msr psp, r0 \n" /* Remember the new top of stack for the task. */\r
- " \n"\r
- " sub r0, r0, #32 \n" /* Go back for the low registers that are not automatically restored. */\r
- " ldmia r0!, {r4-r7} \n" /* Pop low registers. */\r
- " mov r1, r14 \n" /* OR R14 with 0x0d. */\r
- " movs r0, #0x0d \n"\r
- " orr r1, r0 \n"\r
- " bx r1 \n"\r
- " \n"\r
- " .align 2 \n"\r
- "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
- );\r
+ /* This function is no longer used, but retained for backward\r
+ compatibility. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
table offset register that can be used to locate the initial stack value.\r
Not all M0 parts have the application vector table at address 0. */\r
__asm volatile(\r
- " cpsie i \n" /* Globally enable interrupts. */\r
- " svc 0 \n" /* System call to start first task. */\r
- " nop \n"\r
+ " ldr r2, pxCurrentTCBConst2 \n" /* Obtain location of pxCurrentTCB. */\r
+ " ldr r3, [r2] \n"\r
+ " ldr r0, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
+ " add r0, #32 \n" /* Discard everything up to r0. */\r
+ " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */\r
+ " movs r0, #2 \n" /* Switch to the psp stack. */\r
+ " msr CONTROL, r0 \n"\r
+ " isb \n"\r
+ " pop {r0-r5} \n" /* Pop the registers that are saved automatically. */\r
+ " mov lr, r5 \n" /* lr is now in r5. */\r
+ " pop {r3} \n" /* Return address is now in r3. */\r
+ " pop {r2} \n" /* Pop and discard XPSR. */\r
+ " cpsie i \n" /* The first task has its context and interrupts can be enabled. */\r
+ " bx r3 \n" /* Finally, jump to the user defined task code. */\r
+ " \n"\r
+ " .align 4 \n"\r
+ "pxCurrentTCBConst2: .word pxCurrentTCB "\r
);\r
}\r
/*-----------------------------------------------------------*/\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
/* Start the first task. */\r
vPortStartFirstTask();\r
\r
+ /* Should never get here as the tasks will now be executing! Call the task\r
+ exit error function to prevent compiler warnings about a static function\r
+ not being called in the case that the application writer overrides this\r
+ functionality by defining configTASK_RETURN_ADDRESS. */\r
+ prvTaskExitError();\r
+\r
/* Should not get here! */\r
return 0;\r
}\r
\r
void vPortEndScheduler( void )\r
{\r
- /* It is unlikely that the CM0 port will require this function as there\r
- is nothing to return to. */\r
+ /* Not implemented in ports where there is nothing to return to.\r
+ Artificially force an assert. */\r
+ configASSERT( uxCriticalNesting == 1000UL );\r
}\r
/*-----------------------------------------------------------*/\r
\r
\r
void vPortExitCritical( void )\r
{\r
+ configASSERT( uxCriticalNesting );\r
uxCriticalNesting--;\r
if( uxCriticalNesting == 0 )\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned long ulSetInterruptMaskFromISR( void )\r
+uint32_t ulSetInterruptMaskFromISR( void )\r
{\r
__asm volatile(\r
" mrs r0, PRIMASK \n"\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vClearInterruptMaskFromISR( unsigned long ulMask )\r
+void vClearInterruptMaskFromISR( uint32_t ulMask )\r
{\r
__asm volatile(\r
" msr PRIMASK, r0 \n"\r
" bx lr "\r
);\r
+\r
+ /* Just to avoid compiler warning. */\r
+ ( void ) ulMask;\r
}\r
/*-----------------------------------------------------------*/\r
\r
" mov r5, r9 \n"\r
" mov r6, r10 \n"\r
" mov r7, r11 \n"\r
- " stmia r0!, {r4-r7} \n"\r
+ " stmia r0!, {r4-r7} \n"\r
" \n"\r
" push {r3, r14} \n"\r
" cpsid i \n"\r
" msr psp, r0 \n" /* Remember the new top of stack for the task. */\r
" \n"\r
" sub r0, r0, #32 \n" /* Go back for the low registers that are not automatically restored. */\r
- " ldmia r0!, {r4-r7} \n" /* Pop low registers. */\r
+ " ldmia r0!, {r4-r7} \n" /* Pop low registers. */\r
" \n"\r
" bx r3 \n"\r
" \n"\r
- " .align 2 \n"\r
+ " .align 4 \n"\r
"pxCurrentTCBConst: .word pxCurrentTCB "\r
);\r
}\r
\r
void xPortSysTickHandler( void )\r
{\r
-unsigned long ulPreviousMask;\r
+uint32_t ulPreviousMask;\r
\r
ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();\r
{\r
*/\r
void prvSetupTimerInterrupt( void )\r
{\r
+ /* Stop and reset the SysTick. */\r
+ *(portNVIC_SYSTICK_CTRL) = 0UL;\r
+ *(portNVIC_SYSTICK_CURRENT_VALUE) = 0UL;\r
+\r
/* Configure SysTick to interrupt at the requested rate. */\r
*(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
*(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
projects / freertos / blobdiff