/*\r
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.\r
+ FreeRTOS V9.0.1 - Copyright (C) 2017 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
calculations. */\r
#define portMISSED_COUNTS_FACTOR ( 45UL )\r
\r
+/* For strict compliance with the Cortex-M spec the task start address should\r
+have bit-0 clear, as it is loaded into the PC on exit from an ISR. */\r
+#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )\r
+\r
/* Let the user override the pre-loading of the initial LR with the address of\r
prvTaskExitError() in case it messes up unwinding of the stack in the\r
debugger. */\r
#define portTASK_RETURN_ADDRESS prvTaskExitError\r
#endif\r
\r
-/* Each task maintains its own interrupt status in the critical nesting\r
-variable. */\r
-static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
-\r
/*\r
* Setup the timer to generate the tick interrupts. The implementation in this\r
* file is weak to allow application writers to change the timer used to\r
\r
/*-----------------------------------------------------------*/\r
\r
+/* Each task maintains its own interrupt status in the critical nesting\r
+variable. */\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
+\r
/*\r
* The number of SysTick increments that make up one tick period.\r
*/\r
-#if configUSE_TICKLESS_IDLE == 1\r
+#if( configUSE_TICKLESS_IDLE == 1 )\r
static uint32_t ulTimerCountsForOneTick = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
* The maximum number of tick periods that can be suppressed is limited by the\r
* 24 bit resolution of the SysTick timer.\r
*/\r
-#if configUSE_TICKLESS_IDLE == 1\r
+#if( configUSE_TICKLESS_IDLE == 1 )\r
static uint32_t xMaximumPossibleSuppressedTicks = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
* Compensate for the CPU cycles that pass while the SysTick is stopped (low\r
* power functionality only.\r
*/\r
-#if configUSE_TICKLESS_IDLE == 1\r
+#if( configUSE_TICKLESS_IDLE == 1 )\r
static uint32_t ulStoppedTimerCompensation = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
* FreeRTOS API functions are not called from interrupts that have been assigned\r
* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
*/\r
-#if ( configASSERT_DEFINED == 1 )\r
+#if( configASSERT_DEFINED == 1 )\r
static uint8_t ucMaxSysCallPriority = 0;\r
static uint32_t ulMaxPRIGROUPValue = 0;\r
static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;\r
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
+ *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */\r
pxTopOfStack--;\r
*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
\r
static void prvTaskExitError( void )\r
{\r
+volatile uint32_t ulDummy = 0UL;\r
+\r
/* A function that implements a task must not exit or attempt to return to\r
its caller as there is nothing to return to. If a task wants to exit it\r
should instead call vTaskDelete( NULL ).\r
defined, then stop here so application writers can catch the error. */\r
configASSERT( uxCriticalNesting == ~0UL );\r
portDISABLE_INTERRUPTS();\r
- for( ;; );\r
+ while( ulDummy == 0 )\r
+ {\r
+ /* This file calls prvTaskExitError() after the scheduler has been\r
+ started to remove a compiler warning about the function being defined\r
+ but never called. ulDummy is used purely to quieten other warnings\r
+ about code appearing after this function is called - making ulDummy\r
+ volatile makes the compiler think the function could return and\r
+ therefore not output an 'unreachable code' warning for code that appears\r
+ after it. */\r
+ }\r
}\r
/*-----------------------------------------------------------*/\r
\r
ucMaxPriorityValue <<= ( uint8_t ) 0x01;\r
}\r
\r
+ #ifdef __NVIC_PRIO_BITS\r
+ {\r
+ /* Check the CMSIS configuration that defines the number of\r
+ priority bits matches the number of priority bits actually queried\r
+ from the hardware. */\r
+ configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );\r
+ }\r
+ #endif\r
+\r
+ #ifdef configPRIO_BITS\r
+ {\r
+ /* Check the FreeRTOS configuration that defines the number of\r
+ priority bits matches the number of priority bits actually queried\r
+ from the hardware. */\r
+ configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );\r
+ }\r
+ #endif\r
+\r
/* Shift the priority group value back to its position within the AIRCR\r
register. */\r
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;\r
/* Should never get here as the tasks will now be executing! Call the task\r
exit error function to prevent compiler warnings about a static function\r
not being called in the case that the application writer overrides this\r
- functionality by defining configTASK_RETURN_ADDRESS. */\r
+ functionality by defining configTASK_RETURN_ADDRESS. Call\r
+ vTaskSwitchContext() so link time optimisation does not remove the\r
+ symbol. */\r
+ vTaskSwitchContext();\r
prvTaskExitError();\r
\r
/* Should not get here! */\r
" mov r0, #0 \n"\r
" msr basepri, r0 \n"\r
" ldmia sp!, {r3, r14} \n"\r
- " \n" /* Restore the context, including the critical nesting count. */\r
+ " \n" /* Restore the context, including the critical nesting count. */\r
" ldr r1, [r3] \n"\r
" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
" ldmia r0!, {r4-r11} \n" /* Pop the registers. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-#if configUSE_TICKLESS_IDLE == 1\r
+#if( configUSE_TICKLESS_IDLE == 1 )\r
\r
__attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )\r
{\r
- uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;\r
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;\r
TickType_t xModifiableIdleTime;\r
\r
/* Make sure the SysTick reload value does not overflow the counter. */\r
\r
/* Enter a critical section but don't use the taskENTER_CRITICAL()\r
method as that will mask interrupts that should exit sleep mode. */\r
- __asm volatile( "cpsid i" );\r
+ __asm volatile( "cpsid i" ::: "memory" );\r
+ __asm volatile( "dsb" );\r
+ __asm volatile( "isb" );\r
\r
/* If a context switch is pending or a task is waiting for the scheduler\r
to be unsuspended then abandon the low power entry. */\r
\r
/* Re-enable interrupts - see comments above the cpsid instruction()\r
above. */\r
- __asm volatile( "cpsie i" );\r
+ __asm volatile( "cpsie i" ::: "memory" );\r
}\r
else\r
{\r
configPRE_SLEEP_PROCESSING( xModifiableIdleTime );\r
if( xModifiableIdleTime > 0 )\r
{\r
- __asm volatile( "dsb" );\r
+ __asm volatile( "dsb" ::: "memory" );\r
__asm volatile( "wfi" );\r
__asm volatile( "isb" );\r
}\r
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );\r
\r
- /* Stop SysTick. Again, the time the SysTick is stopped for is\r
- accounted for as best it can be, but using the tickless mode will\r
- inevitably result in some tiny drift of the time maintained by the\r
- kernel with respect to calendar time. */\r
- ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG;\r
- portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE_BIT );\r
-\r
- /* Re-enable interrupts - see comments above the cpsid instruction()\r
- above. */\r
- __asm volatile( "cpsie i" );\r
-\r
- if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )\r
+ /* Re-enable interrupts to allow the interrupt that brought the MCU\r
+ out of sleep mode to execute immediately. see comments above\r
+ __disable_interrupt() call above. */\r
+ __asm volatile( "cpsie i" ::: "memory" );\r
+ __asm volatile( "dsb" );\r
+ __asm volatile( "isb" );\r
+\r
+ /* Disable interrupts again because the clock is about to be stopped\r
+ and interrupts that execute while the clock is stopped will increase\r
+ any slippage between the time maintained by the RTOS and calendar\r
+ time. */\r
+ __asm volatile( "cpsid i" ::: "memory" );\r
+ __asm volatile( "dsb" );\r
+ __asm volatile( "isb" );\r
+\r
+ /* Disable the SysTick clock without reading the\r
+ portNVIC_SYSTICK_CTRL_REG register to ensure the\r
+ portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,\r
+ the time the SysTick is stopped for is accounted for as best it can\r
+ be, but using the tickless mode will inevitably result in some tiny\r
+ drift of the time maintained by the kernel with respect to calendar\r
+ time*/\r
+ portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );\r
+\r
+ /* Determine if the SysTick clock has already counted to zero and\r
+ been set back to the current reload value (the reload back being\r
+ correct for the entire expected idle time) or if the SysTick is yet\r
+ to count to zero (in which case an interrupt other than the SysTick\r
+ must have brought the system out of sleep mode). */\r
+ if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )\r
{\r
uint32_t ulCalculatedLoadValue;\r
\r
- /* The tick interrupt has already executed, and the SysTick\r
- count reloaded with ulReloadValue. Reset the\r
+ /* The tick interrupt is already pending, and the SysTick count\r
+ reloaded with ulReloadValue. Reset the\r
portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick\r
period. */\r
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );\r
\r
portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;\r
\r
- /* The tick interrupt handler will already have pended the tick\r
- processing in the kernel. As the pending tick will be\r
- processed as soon as this function exits, the tick value\r
- maintained by the tick is stepped forward by one less than the\r
- time spent waiting. */\r
+ /* As the pending tick will be processed as soon as this\r
+ function exits, the tick value maintained by the tick is stepped\r
+ forward by one less than the time spent waiting. */\r
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;\r
}\r
else\r
\r
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG\r
again, then set portNVIC_SYSTICK_LOAD_REG back to its standard\r
- value. The critical section is used to ensure the tick interrupt\r
- can only execute once in the case that the reload register is near\r
- zero. */\r
+ value. */\r
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r
- portENTER_CRITICAL();\r
- {\r
- portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;\r
- vTaskStepTick( ulCompleteTickPeriods );\r
- portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;\r
- }\r
- portEXIT_CRITICAL();\r
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;\r
+ vTaskStepTick( ulCompleteTickPeriods );\r
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;\r
+\r
+ /* Exit with interrpts enabled. */\r
+ __asm volatile( "cpsie i" ::: "memory" );\r
}\r
}\r
\r
-#endif /* #if configUSE_TICKLESS_IDLE */\r
+#endif /* configUSE_TICKLESS_IDLE */\r
/*-----------------------------------------------------------*/\r
\r
/*\r
__attribute__(( weak )) void vPortSetupTimerInterrupt( void )\r
{\r
/* Calculate the constants required to configure the tick interrupt. */\r
- #if configUSE_TICKLESS_IDLE == 1\r
+ #if( configUSE_TICKLESS_IDLE == 1 )\r
{\r
ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );\r
xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;\r
}\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
+ /* Stop and clear the SysTick. */\r
+ portNVIC_SYSTICK_CTRL_REG = 0UL;\r
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r
+\r
/* Configure SysTick to interrupt at the requested rate. */\r
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );\r
uint8_t ucCurrentPriority;\r
\r
/* Obtain the number of the currently executing interrupt. */\r
- __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );\r
+ __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
\r
/* Is the interrupt number a user defined interrupt? */\r
if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )\r
devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the\r
scheduler. Note however that some vendor specific peripheral libraries\r
assume a non-zero priority group setting, in which cases using a value\r
- of zero will result in unpredicable behaviour. */\r
+ of zero will result in unpredictable behaviour. */\r
configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );\r
}\r
\r
projects / freertos / blobdiff