]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c
Improvements to the Cortex-M ports:
[freertos] / FreeRTOS / Source / portable / GCC / ARM_CM3_MPU / port.c
index 0f30f01615f2b316883d7226a0f3cf5d3d7b23bf..986b988240fd418bfaa9c9b7684c805471504737 100644 (file)
@@ -89,6 +89,7 @@ task.h is included from an application file. */
 /* Constants required to access and manipulate the NVIC. */\r
 #define portNVIC_SYSTICK_CTRL_REG                              ( * ( ( volatile uint32_t * ) 0xe000e010 ) )\r
 #define portNVIC_SYSTICK_LOAD_REG                              ( * ( ( volatile uint32_t * ) 0xe000e014 ) )\r
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG             ( * ( ( volatile uint32_t * ) 0xe000e018 ) )\r
 #define portNVIC_SYSPRI2_REG                                   ( *     ( ( volatile uint32_t * ) 0xe000ed20 ) )\r
 #define portNVIC_SYSPRI1_REG                                   ( * ( ( volatile uint32_t * ) 0xe000ed1c ) )\r
 #define portNVIC_SYS_CTRL_STATE_REG                            ( * ( ( volatile uint32_t * ) 0xe000ed24 ) )\r
@@ -449,6 +450,7 @@ void xPortPendSVHandler( void )
                "       mrs r1, control                                         \n"\r
                "       stmdb r0!, {r1, r4-r11}                         \n" /* Save the remaining registers. */\r
                "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
+               "       clrex                                                           \n" /* Ensure thread safety of atomic operations. */\r
                "                                                                               \n"\r
                "       stmdb sp!, {r3, r14}                            \n"\r
                "       mov r0, %0                                                      \n"\r
@@ -500,6 +502,10 @@ uint32_t ulDummy;
  */\r
 static void prvSetupTimerInterrupt( void )\r
 {\r
+       /* Reset the SysTick timer. */\r
+       portNVIC_SYSTICK_CTRL_REG = 0UL;\r
+       portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r
+\r
        /* Configure SysTick to interrupt at the requested rate. */\r
        portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
        portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r