Add barrier instructions to the GCC CM3 ports.

[freertos] / FreeRTOS / Source / portable / GCC / ARM_CM4F / port.c

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
index 213b712778dd98b76f8072310aad8b9538395af5..0b06b64cf70c7c92952691e7ca0b64664b4f27a7 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
@@ -56,19 +56,19 @@
     ***************************************************************************\r
 \r
 \r
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
     license and Real Time Engineers Ltd. contact details.\r
 \r
     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
     including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
     fully thread aware and reentrant UDP/IP stack.\r
 \r
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
-    Integrity Systems, who sell the code with commercial support, \r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems, who sell the code with commercial support,\r
     indemnification and middleware, under the OpenRTOS brand.\r
-    \r
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
-    engineered and independently SIL3 certified version for use in safety and \r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
     mission critical applications that require provable dependability.\r
 */\r
 \r
@@ -92,14 +92,12 @@
 #define portNVIC_SYSTICK_CTRL_REG                      ( * ( ( volatile unsigned long * ) 0xe000e010 ) )\r
 #define portNVIC_SYSTICK_LOAD_REG                      ( * ( ( volatile unsigned long * ) 0xe000e014 ) )\r
 #define portNVIC_SYSTICK_CURRENT_VALUE_REG     ( * ( ( volatile unsigned long * ) 0xe000e018 ) )\r
-#define portNVIC_INT_CTRL_REG                          ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
 #define portNVIC_SYSPRI2_REG                           ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )\r
 /* ...then bits in the registers. */\r
 #define portNVIC_SYSTICK_CLK_BIT                       ( 1UL << 2UL )\r
 #define portNVIC_SYSTICK_INT_BIT                       ( 1UL << 1UL )\r
 #define portNVIC_SYSTICK_ENABLE_BIT                    ( 1UL << 0UL )\r
 #define portNVIC_SYSTICK_COUNT_FLAG_BIT                ( 1UL << 16UL )\r
-#define portNVIC_PENDSVSET_BIT                         ( 1UL << 28UL )\r
 #define portNVIC_PENDSVCLEAR_BIT                       ( 1UL << 27UL )\r
 #define portNVIC_PEND_SYSTICK_CLEAR_BIT                ( 1UL << 25UL )\r
 \r
@@ -279,10 +277,15 @@ void vPortEndScheduler( void )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vPortYieldFromISR( void )\r
+void vPortYield( void )\r
 {\r
        /* Set a PendSV to request a context switch. */\r
        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
+\r
+       /* Barriers are normally not required but do ensure the code is completely\r
+       within the specified behaviour for the architecture. */\r
+       __asm volatile( "dsb" );\r
+       __asm volatile( "isb" );\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -290,6 +293,8 @@ void vPortEnterCritical( void )
 {\r
        portDISABLE_INTERRUPTS();\r
        uxCriticalNesting++;\r
+       __asm volatile( "dsb" );\r
+       __asm volatile( "isb" );\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -473,6 +478,8 @@ void xPortSysTickHandler( void )
                        if( xModifiableIdleTime > 0 )\r
                        {\r
                                __asm volatile( "wfi" );\r
+                               __asm volatile( "dsb" );\r
+                               __asm volatile( "isb" );\r
                        }\r
                        configPOST_SLEEP_PROCESSING( xExpectedIdleTime );\r
 \r