]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h
+ New feature added: Task notifications.
[freertos] / FreeRTOS / Source / portable / GCC / ARM_CM4F / portmacro.h
index 763935dce6ff7235394d7ea7e89da29186037613..41f1fbc7d22c976853400ad047e9203920f75466 100644 (file)
@@ -109,25 +109,21 @@ typedef unsigned long UBaseType_t;
 #define portBYTE_ALIGNMENT                     8\r
 /*-----------------------------------------------------------*/\r
 \r
-\r
 /* Scheduler utilities. */\r
-extern void vPortYield( void );\r
 #define portNVIC_INT_CTRL_REG          ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
 #define portNVIC_PENDSVSET_BIT         ( 1UL << 28UL )\r
-#define portYIELD()                                    vPortYield()\r
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
+#define portYIELD() vPortYield()\r
+#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) vPortYield()\r
 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Critical section management. */\r
 extern void vPortEnterCritical( void );\r
 extern void vPortExitCritical( void );\r
-extern uint32_t ulPortSetInterruptMask( void );\r
-extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()              ulPortSetInterruptMask()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)   vPortClearInterruptMask(x)\r
-#define portDISABLE_INTERRUPTS()                               ulPortSetInterruptMask()\r
-#define portENABLE_INTERRUPTS()                                        vPortClearInterruptMask(0)\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()              ulPortRaiseBASEPRI()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)   vPortSetBASEPRI(x)\r
+#define portDISABLE_INTERRUPTS()                               ulPortRaiseBASEPRI()\r
+#define portENABLE_INTERRUPTS()                                        vPortSetBASEPRI(0)\r
 #define portENTER_CRITICAL()                                   vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                                            vPortExitCritical()\r
 \r
@@ -188,6 +184,53 @@ not necessary for to use this port.  They are defined so the common demo files
 /* portNOP() is not required by this port. */\r
 #define portNOP()\r
 \r
+#ifndef portFORCE_INLINE\r
+       #define portFORCE_INLINE inline __attribute__(( always_inline))\r
+#endif\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )\r
+{\r
+uint32_t ulOriginalBASEPRI, ulNewBASEPRI;\r
+\r
+       __asm volatile\r
+       (\r
+               "       mrs %0, basepri                                                                                 \n" \\r
+               "       mov %1, %2                                                                                              \n"     \\r
+               "       msr basepri, %1                                                                                 \n" \\r
+               "       isb                                                                                                             \n" \\r
+               "       dsb                                                                                                             \n" \\r
+               :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
+       );\r
+\r
+       /* This return will not be reached but is necessary to prevent compiler\r
+       warnings. */\r
+       return ulOriginalBASEPRI;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )\r
+{\r
+       __asm volatile\r
+       (\r
+               "       msr basepri, %0 " :: "r" ( ulNewMaskValue )\r
+       );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static void vPortYield( void )\r
+{\r
+       /* Set a PendSV to request a context switch. */\r
+       portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
+\r
+       /* Barriers are normally not required but do ensure the code is completely\r
+       within the specified behaviour for the architecture. */\r
+       __asm volatile( "dsb" );\r
+       __asm volatile( "isb" );\r
+}\r
+\r
+\r
 #ifdef __cplusplus\r
 }\r
 #endif\r