+ New feature added: Task notifications.

[freertos] / FreeRTOS / Source / portable / GCC / ARM_CM4F / portmacro.h

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h
index 98ec55bd48da3644d23c1ed2533e7b2d10ef05ad..41f1fbc7d22c976853400ad047e9203920f75466 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-    FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+    FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd.\r
     All rights reserved\r
 \r
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
@@ -24,10 +24,10 @@
     the terms of the GNU General Public License (version 2) as published by the\r
     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
 \r
-    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
-    >>! a combined work that includes FreeRTOS without being obliged to provide\r
-    >>! the source code for proprietary components outside of the FreeRTOS\r
-    >>! kernel.\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
 \r
     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
@@ -105,29 +105,25 @@ typedef unsigned long UBaseType_t;
 \r
 /* Architecture specifics. */\r
 #define portSTACK_GROWTH                       ( -1 )\r
-#define portTICK_RATE_MS                       ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_PERIOD_MS                     ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
 #define portBYTE_ALIGNMENT                     8\r
 /*-----------------------------------------------------------*/\r
 \r
-\r
 /* Scheduler utilities. */\r
-extern void vPortYield( void );\r
 #define portNVIC_INT_CTRL_REG          ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
 #define portNVIC_PENDSVSET_BIT         ( 1UL << 28UL )\r
-#define portYIELD()                                    vPortYield()\r
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
+#define portYIELD() vPortYield()\r
+#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) vPortYield()\r
 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Critical section management. */\r
 extern void vPortEnterCritical( void );\r
 extern void vPortExitCritical( void );\r
-extern uint32_t ulPortSetInterruptMask( void );\r
-extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()              ulPortSetInterruptMask()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)   vPortClearInterruptMask(x)\r
-#define portDISABLE_INTERRUPTS()                               ulPortSetInterruptMask()\r
-#define portENABLE_INTERRUPTS()                                        vPortClearInterruptMask(0)\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()              ulPortRaiseBASEPRI()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)   vPortSetBASEPRI(x)\r
+#define portDISABLE_INTERRUPTS()                               ulPortRaiseBASEPRI()\r
+#define portENABLE_INTERRUPTS()                                        vPortSetBASEPRI(0)\r
 #define portENTER_CRITICAL()                                   vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                                            vPortExitCritical()\r
 \r
@@ -148,6 +144,10 @@ not necessary for to use this port.  They are defined so the common demo files
 /*-----------------------------------------------------------*/\r
 \r
 /* Architecture specific optimisations. */\r
+#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\r
+       #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
+#endif\r
+\r
 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
 \r
        /* Generic helper function. */\r
@@ -184,6 +184,53 @@ not necessary for to use this port.  They are defined so the common demo files
 /* portNOP() is not required by this port. */\r
 #define portNOP()\r
 \r
+#ifndef portFORCE_INLINE\r
+       #define portFORCE_INLINE inline __attribute__(( always_inline))\r
+#endif\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )\r
+{\r
+uint32_t ulOriginalBASEPRI, ulNewBASEPRI;\r
+\r
+       __asm volatile\r
+       (\r
+               "       mrs %0, basepri                                                                                 \n" \\r
+               "       mov %1, %2                                                                                              \n"     \\r
+               "       msr basepri, %1                                                                                 \n" \\r
+               "       isb                                                                                                             \n" \\r
+               "       dsb                                                                                                             \n" \\r
+               :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
+       );\r
+\r
+       /* This return will not be reached but is necessary to prevent compiler\r
+       warnings. */\r
+       return ulOriginalBASEPRI;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )\r
+{\r
+       __asm volatile\r
+       (\r
+               "       msr basepri, %0 " :: "r" ( ulNewMaskValue )\r
+       );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static void vPortYield( void )\r
+{\r
+       /* Set a PendSV to request a context switch. */\r
+       portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
+\r
+       /* Barriers are normally not required but do ensure the code is completely\r
+       within the specified behaviour for the architecture. */\r
+       __asm volatile( "dsb" );\r
+       __asm volatile( "isb" );\r
+}\r
+\r
+\r
 #ifdef __cplusplus\r
 }\r
 #endif\r