Add additional memory barriers into ARM GCC asm code to ensure no re-ordering across...

[freertos] / FreeRTOS / Source / portable / GCC / ARM_CM7 / r0p1 / portmacro.h

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h
index 30b0081fafb19b1c4875441ab50e58b28d39d943..3b9a9e4a21c5b8c22dccbc5a53c295f482668c3d 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h
@@ -125,7 +125,7 @@ typedef unsigned long UBaseType_t;
                                                                                                                                                                \\r
        /* Barriers are normally not required but do ensure the code is completely      \\r
        within the specified behaviour for the architecture. */                                         \\r
-       __asm volatile( "dsb" );                                                                                                        \\r
+       __asm volatile( "dsb" ::: "memory" );                                                                           \\r
        __asm volatile( "isb" );                                                                                                        \\r
 }\r
 \r
@@ -173,7 +173,7 @@ not necessary for to use this port.  They are defined so the common demo files
        {\r
        uint8_t ucReturn;\r
 \r
-               __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );\r
+               __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );\r
                return ucReturn;\r
        }\r
 \r
@@ -214,7 +214,7 @@ uint32_t ulCurrentInterrupt;
 BaseType_t xReturn;\r
 \r
        /* Obtain the number of the currently executing interrupt. */\r
-       __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );\r
+       __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
 \r
        if( ulCurrentInterrupt == 0 )\r
        {\r
@@ -242,7 +242,7 @@ uint32_t ulNewBASEPRI;
                "       isb                                                                                                             \n" \\r
                "       dsb                                                                                                             \n" \\r
                "       cpsie i                                                                                                 \n" \\r
-               :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
+               :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"\r
        );\r
 }\r
 \r
@@ -261,7 +261,7 @@ uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
                "       isb                                                                                                             \n" \\r
                "       dsb                                                                                                             \n" \\r
                "       cpsie i                                                                                                 \n" \\r
-               :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
+               :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"\r
        );\r
 \r
        /* This return will not be reached but is necessary to prevent compiler\r
@@ -274,7 +274,7 @@ portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
 {\r
        __asm volatile\r
        (\r
-               "       msr basepri, %0 " :: "r" ( ulNewMaskValue )\r
+               "       msr basepri, %0 " :: "r" ( ulNewMaskValue ) : "memory"\r
        );\r
 }\r
 /*-----------------------------------------------------------*/\r