Add additional memory barriers into ARM GCC asm code to ensure no re-ordering across...

[freertos] / FreeRTOS / Source / portable / GCC / ARM_CM7 / r0p1 / portmacro.h

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h
index 60df2b157d9b45a923f9d754dc13b7ef980131cd..3b9a9e4a21c5b8c22dccbc5a53c295f482668c3d 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h
@@ -1,5 +1,5 @@
 /*\r
-    FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+    FreeRTOS V9.0.1 - Copyright (C) 2017 Real Time Engineers Ltd.\r
     All rights reserved\r
 \r
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
@@ -8,7 +8,7 @@
 \r
     FreeRTOS is free software; you can redistribute it and/or modify it under\r
     the terms of the GNU General Public License (version 2) as published by the\r
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
 \r
     ***************************************************************************\r
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
@@ -125,7 +125,7 @@ typedef unsigned long UBaseType_t;
                                                                                                                                                                \\r
        /* Barriers are normally not required but do ensure the code is completely      \\r
        within the specified behaviour for the architecture. */                                         \\r
-       __asm volatile( "dsb" );                                                                                                        \\r
+       __asm volatile( "dsb" ::: "memory" );                                                                           \\r
        __asm volatile( "isb" );                                                                                                        \\r
 }\r
 \r
@@ -173,7 +173,7 @@ not necessary for to use this port.  They are defined so the common demo files
        {\r
        uint8_t ucReturn;\r
 \r
-               __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );\r
+               __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );\r
                return ucReturn;\r
        }\r
 \r
@@ -188,7 +188,7 @@ not necessary for to use this port.  They are defined so the common demo files
 \r
        /*-----------------------------------------------------------*/\r
 \r
-       #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )\r
+       #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )\r
 \r
 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */\r
 \r
@@ -202,10 +202,32 @@ not necessary for to use this port.  They are defined so the common demo files
 /* portNOP() is not required by this port. */\r
 #define portNOP()\r
 \r
+#define portINLINE     __inline\r
+\r
 #ifndef portFORCE_INLINE\r
        #define portFORCE_INLINE inline __attribute__(( always_inline))\r
 #endif\r
 \r
+portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+       /* Obtain the number of the currently executing interrupt. */\r
+       __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+       if( ulCurrentInterrupt == 0 )\r
+       {\r
+               xReturn = pdFALSE;\r
+       }\r
+       else\r
+       {\r
+               xReturn = pdTRUE;\r
+       }\r
+\r
+       return xReturn;\r
+}\r
+\r
 /*-----------------------------------------------------------*/\r
 \r
 portFORCE_INLINE static void vPortRaiseBASEPRI( void )\r
@@ -220,7 +242,7 @@ uint32_t ulNewBASEPRI;
                "       isb                                                                                                             \n" \\r
                "       dsb                                                                                                             \n" \\r
                "       cpsie i                                                                                                 \n" \\r
-               :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
+               :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"\r
        );\r
 }\r
 \r
@@ -239,7 +261,7 @@ uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
                "       isb                                                                                                             \n" \\r
                "       dsb                                                                                                             \n" \\r
                "       cpsie i                                                                                                 \n" \\r
-               :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
+               :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"\r
        );\r
 \r
        /* This return will not be reached but is necessary to prevent compiler\r
@@ -252,7 +274,7 @@ portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
 {\r
        __asm volatile\r
        (\r
-               "       msr basepri, %0 " :: "r" ( ulNewMaskValue )\r
+               "       msr basepri, %0 " :: "r" ( ulNewMaskValue ) : "memory"\r
        );\r
 }\r
 /*-----------------------------------------------------------*/\r