*****************************************************************************/\r
\r
/*\r
- FreeRTOS V7.5.1 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ FreeRTOS V8.1.0 - Copyright (C) 2014 Real Time Engineers Ltd. \r
+ All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
the terms of the GNU General Public License (version 2) as published by the\r
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
\r
- >>! NOTE: The modification to the GPL is included to allow you to distribute\r
- >>! a combined work that includes FreeRTOS without being obliged to provide\r
- >>! the source code for proprietary components outside of the FreeRTOS\r
- >>! kernel.\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
\r
\r
/* Constants required to setup the task context. */\r
-#define portINITIAL_SR ( ( portSTACK_TYPE ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 0 )\r
+#define portINITIAL_SR ( ( StackType_t ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 0 )\r
\r
/* Each task maintains its own critical nesting variable. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
-volatile unsigned long ulCriticalNesting = 9999UL;\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
\r
#if( configTICK_USE_TC==0 )\r
static void prvScheduleNextTick( void );\r
#if configHEAP_INIT\r
extern void __heap_start__;\r
extern void __heap_end__;\r
- portBASE_TYPE *pxMem;\r
+ BaseType_t *pxMem;\r
#endif\r
\r
/* Load the Exception Vector Base Address in the corresponding system register. */\r
#if configHEAP_INIT\r
\r
/* Initialize the heap used by malloc. */\r
- for( pxMem = &__heap_start__; pxMem < ( portBASE_TYPE * )&__heap_end__; )\r
+ for( pxMem = &__heap_start__; pxMem < ( BaseType_t * )&__heap_end__; )\r
{\r
*pxMem++ = 0xA5A5A5A5;\r
}\r
*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
/* Setup the initial stack of the task. The stack is set exactly as\r
expected by the portRESTORE_CONTEXT() macro. */\r
\r
/* When the task starts, it will expect to find the function parameter in R12. */\r
pxTopOfStack--;\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0A0A0A0A; /* R10 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0B0B0B0B; /* R11 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) pvParameters; /* R12 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0xDEADBEEF; /* R14/LR */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) portINITIAL_SR; /* SR */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0xFF0000FF; /* R0 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x08080808; /* R8 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x09090909; /* R9 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x0A0A0A0A; /* R10 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x0B0B0B0B; /* R11 */\r
+ *pxTopOfStack-- = ( StackType_t ) pvParameters; /* R12 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0xDEADBEEF; /* R14/LR */\r
+ *pxTopOfStack-- = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */\r
+ *pxTopOfStack-- = ( StackType_t ) portINITIAL_SR; /* SR */\r
+ *pxTopOfStack-- = ( StackType_t ) 0xFF0000FF; /* R0 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x01010101; /* R1 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x02020202; /* R2 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x03030303; /* R3 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x04040404; /* R4 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x05050505; /* R5 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x06060606; /* R6 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Start the timer that generates the tick ISR. Interrupts are disabled\r
here already. */\r
#if( configTICK_USE_TC==0 )\r
static void prvScheduleFirstTick(void)\r
{\r
- unsigned long lCycles;\r
+ uint32_t lCycles;\r
\r
lCycles = Get_system_register(AVR32_COUNT);\r
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);\r
\r
__attribute__((__noinline__)) static void prvScheduleNextTick(void)\r
{\r
- unsigned long lCycles, lCount;\r
+ uint32_t lCycles, lCount;\r
\r
lCycles = Get_system_register(AVR32_COMPARE);\r
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);\r