/*\r
- FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.\r
- \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
***************************************************************************\r
* *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
* *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
* *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * Thank you! *\r
* *\r
***************************************************************************\r
\r
-\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
- >>>NOTE<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
- more details. You should have received a copy of the GNU General Public\r
- License and the FreeRTOS license exception along with FreeRTOS; if not it\r
- can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
- by writing to Richard Barry, contact details for whom are available on the\r
- FreeRTOS WEB site.\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+ >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+ >>! a combined work that includes FreeRTOS without being obliged to provide\r
+ >>! the source code for proprietary components outside of the FreeRTOS\r
+ >>! kernel.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
\r
1 tab == 4 spaces!\r
- \r
+\r
***************************************************************************\r
* *\r
* Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong? *\r
+ * not run, what could be wrong?" *\r
* *\r
* http://www.FreeRTOS.org/FAQHelp.html *\r
* *\r
***************************************************************************\r
\r
- \r
- http://www.FreeRTOS.org - Documentation, training, latest information, \r
- license and contact details.\r
- \r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool.\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
\r
- Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
- the code with commercial support, indemnification, and middleware, under \r
- the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
- provide a safety engineered and independently SIL3 certified version under \r
- the SafeRTOS brand: http://www.SafeRTOS.com.\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
*/\r
\r
/*-----------------------------------------------------------\r
#include <xil_exception.h>\r
#include <microblaze_exceptions_g.h>\r
\r
-/* Tasks are started with a critical section nesting of 0 - however, prior to \r
-the scheduler being commenced interrupts should not be enabled, so the critical \r
+/* Tasks are started with a critical section nesting of 0 - however, prior to\r
+the scheduler being commenced interrupts should not be enabled, so the critical\r
nesting variable is initialised to a non-zero value. */\r
#define portINITIAL_NESTING_VALUE ( 0xff )\r
\r
*/\r
static long prvInitialiseInterruptController( void );\r
\r
-/* Ensure the interrupt controller instance variable is initialised before it is \r
- * used, and that the initialisation only happens once. \r
+/* Ensure the interrupt controller instance variable is initialised before it is\r
+ * used, and that the initialisation only happens once.\r
*/\r
static long prvEnsureInterruptControllerIsInitialised( void );\r
\r
/*-----------------------------------------------------------*/\r
\r
-/* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task \r
+/* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task\r
maintains its own count, so this variable is saved as part of the task\r
context. */\r
volatile unsigned portBASE_TYPE uxCriticalNesting = portINITIAL_NESTING_VALUE;\r
get set to 1. ulTaskSwitchRequested is inspected just before the main interrupt\r
handler exits. If, at that time, ulTaskSwitchRequested is set to 1, the kernel\r
will call vTaskSwitchContext() to ensure the task that runs immediately after\r
-the interrupt exists is the highest priority task that is able to run. This is \r
-an unusual mechanism, but is used for this port because a single interrupt can \r
+the interrupt exists is the highest priority task that is able to run. This is\r
+an unusual mechanism, but is used for this port because a single interrupt can\r
cause the servicing of multiple peripherals - and it is inefficient to call\r
vTaskSwitchContext() multiple times as each peripheral is serviced. */\r
volatile unsigned long ulTaskSwitchRequested = 0UL;\r
\r
/*-----------------------------------------------------------*/\r
\r
-/* \r
- * Initialise the stack of a task to look exactly as if a call to \r
+/*\r
+ * Initialise the stack of a task to look exactly as if a call to\r
* portSAVE_CONTEXT had been made.\r
- * \r
+ *\r
* See the portable.h header file.\r
*/\r
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
const unsigned long ulR2 = ( unsigned long ) &_SDA2_BASE_;\r
const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;\r
\r
- /* Place a few bytes of known values on the bottom of the stack. \r
+ /* Place a few bytes of known values on the bottom of the stack.\r
This is essential for the Microblaze port and these lines must\r
not be omitted. */\r
*pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;\r
/* First stack an initial value for the critical section nesting. This\r
is initialised to zero. */\r
*pxTopOfStack = ( portSTACK_TYPE ) 0x00;\r
- \r
+\r
/* R0 is always zero. */\r
/* R1 is the SP. */\r
\r
#else\r
pxTopOfStack-= 8;\r
#endif\r
- \r
+\r
*pxTopOfStack = ( portSTACK_TYPE ) ulR13; /* R13 - read/write small data area. */\r
pxTopOfStack--;\r
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* R14 - return address for interrupt. */\r
pxTopOfStack--;\r
*pxTopOfStack = ( portSTACK_TYPE ) NULL; /* R15 - return address for subroutine. */\r
- \r
+\r
#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING\r
pxTopOfStack--;\r
*pxTopOfStack = ( portSTACK_TYPE ) 0x10; /* R16 - return address for trap (debugger). */\r
#else\r
pxTopOfStack -= 4;\r
#endif\r
- \r
+\r
*pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */\r
- \r
- #ifdef portPRE_LOAD_STACK_FOR_DEBUGGING \r
+\r
+ #ifdef portPRE_LOAD_STACK_FOR_DEBUGGING\r
pxTopOfStack--;\r
*pxTopOfStack = ( portSTACK_TYPE ) 0x14; /* R20 - reserved for storing a pointer to the Global Offset Table (GOT) in Position Independent Code (PIC). Non-volatile in non-PIC code. Must be saved across function calls. Callee-save. Not used by FreeRTOS. */\r
pxTopOfStack--;\r
pxTopOfStack -= 13;\r
#endif\r
\r
- /* Return a pointer to the top of the stack that has been generated so this \r
+ /* Return a pointer to the top of the stack that has been generated so this\r
can be stored in the task control block for the task. */\r
return pxTopOfStack;\r
}\r
extern unsigned long _stack[];\r
\r
/* Setup the hardware to generate the tick. Interrupts are disabled when\r
- this function is called. \r
- \r
+ this function is called.\r
+\r
This port uses an application defined callback function to install the tick\r
- interrupt handler because the kernel will run on lots of different \r
- MicroBlaze and FPGA configurations - not all of which will have the same \r
+ interrupt handler because the kernel will run on lots of different\r
+ MicroBlaze and FPGA configurations - not all of which will have the same\r
timer peripherals defined or available. An example definition of\r
vApplicationSetupTimerInterrupt() is provided in the official demo\r
application that accompanies this port. */\r
\r
void vPortEndScheduler( void )\r
{\r
- /* Not implemented. */\r
+ /* Not implemented in ports where there is nothing to return to.\r
+ Artificially force an assert. */\r
+ configASSERT( uxCriticalNesting == 1000UL );\r
}\r
/*-----------------------------------------------------------*/\r
\r
/*\r
- * Manual context switch called by portYIELD or taskYIELD. \r
+ * Manual context switch called by portYIELD or taskYIELD.\r
*/\r
void vPortYield( void )\r
{\r
{\r
XIntc_Enable( &xInterruptControllerInstance, ucInterruptID );\r
}\r
- \r
+\r
configASSERT( lReturn );\r
}\r
/*-----------------------------------------------------------*/\r
controller because the interrupt controller instance variable is private\r
to this file. */\r
lReturn = prvEnsureInterruptControllerIsInitialised();\r
- \r
+\r
if( lReturn == pdPASS )\r
{\r
XIntc_Disable( &xInterruptControllerInstance, ucInterruptID );\r
}\r
- \r
+\r
configASSERT( lReturn );\r
}\r
/*-----------------------------------------------------------*/\r
{\r
long lReturn;\r
\r
- /* An API function is provided to install an interrupt handler because the \r
+ /* An API function is provided to install an interrupt handler because the\r
interrupt controller instance variable is private to this file. */\r
\r
lReturn = prvEnsureInterruptControllerIsInitialised();\r
- \r
+\r
if( lReturn == pdPASS )\r
{\r
lReturn = XIntc_Connect( &xInterruptControllerInstance, ucInterruptID, pxHandler, pvCallBackRef );\r
{\r
lReturn = pdPASS;\r
}\r
- \r
+\r
configASSERT( lReturn == pdPASS );\r
\r
return lReturn;\r
if( lInterruptControllerInitialised != pdTRUE )\r
{\r
lReturn = prvInitialiseInterruptController();\r
- \r
+\r
if( lReturn == pdPASS )\r
{\r
lInterruptControllerInitialised = pdTRUE;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-/* \r
+/*\r
* Handler for the timer interrupt. This is the handler that the application\r
* defined callback function vApplicationSetupTimerInterrupt() should install.\r
*/\r
( void ) pvUnused;\r
\r
/* This port uses an application defined callback function to clear the tick\r
- interrupt because the kernel will run on lots of different MicroBlaze and \r
- FPGA configurations - not all of which will have the same timer peripherals \r
+ interrupt because the kernel will run on lots of different MicroBlaze and\r
+ FPGA configurations - not all of which will have the same timer peripherals\r
defined or available. An example definition of\r
vApplicationClearTimerInterrupt() is provided in the official demo\r
- application that accompanies this port. */ \r
+ application that accompanies this port. */\r
vApplicationClearTimerInterrupt();\r
\r
/* Increment the RTOS tick - this might cause a task to unblock. */\r
- vTaskIncrementTick();\r
-\r
- /* If the preemptive scheduler is being used then a context switch should be\r
- requested in case incrementing the tick unblocked a task, or a time slice\r
- should cause another task to enter the Running state. */\r
- #if configUSE_PREEMPTION == 1\r
+ if( xTaskIncrementTick() != pdFALSE )\r
+ {\r
/* Force vTaskSwitchContext() to be called as the interrupt exits. */\r
ulTaskSwitchRequested = 1;\r
- #endif\r
+ }\r
}\r
/*-----------------------------------------------------------*/\r
\r
projects / freertos / blobdiff