Basic 64-bit RISC-V port now functional. RISC-V port layer automatically switches...

[freertos] / FreeRTOS / Source / portable / GCC / RISC-V / port.c

diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/port.c b/FreeRTOS/Source/portable/GCC/RISC-V/port.c
index 836c4fa90ce9671376e537e62a3f626c429beb63..20bc051d9f495acfb6c01839d9489fac3d465965 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/RISC-V/port.c
+++ b/FreeRTOS/Source/portable/GCC/RISC-V/port.c
@@ -74,7 +74,7 @@ void vPortSetupTimerInterrupt( void ) __attribute__(( weak ));
 /* Used to program the machine timer compare register. */\r
 uint64_t ullNextTime = 0ULL;\r
 const uint64_t *pullNextTime = &ullNextTime;\r
-const uint32_t ulTimerIncrementsForOneTick = ( uint32_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); /* Assumes increment won't go over 32-bits. */\r
+const size_t uxTimerIncrementsForOneTick = ( size_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); /* Assumes increment won't go over 32-bits. */\r
 volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) ( configCLINT_BASE_ADDRESS + 0x4000 );\r
 \r
 /* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task\r
@@ -120,11 +120,11 @@ task stack, not the ISR stack). */
                ullNextTime = ( uint64_t ) ulCurrentTimeHigh;\r
                ullNextTime <<= 32ULL;\r
                ullNextTime |= ( uint64_t ) ulCurrentTimeLow;\r
-               ullNextTime += ( uint64_t ) ulTimerIncrementsForOneTick;\r
+               ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;\r
                *pullMachineTimerCompareRegister = ullNextTime;\r
 \r
                /* Prepare the time to use after the next tick interrupt. */\r
-               ullNextTime += ( uint64_t ) ulTimerIncrementsForOneTick;\r
+               ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;\r
        }\r
 \r
 #endif /* ( configCLINT_BASE_ADDRESS != 0 ) */\r