+ New feature added: Task notifications.

[freertos] / FreeRTOS / Source / portable / IAR / ARM_CM4F / portasm.s

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
index 470ee07fb355f45d609e743fb60563183ca2d1bc..546c95479a0bfaf06bc9f8041d9be300468e8418 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
@@ -1,5 +1,6 @@
 /*\r
-    FreeRTOS V7.5.1 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+    FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+    All rights reserved\r
 \r
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
 \r
@@ -23,10 +24,10 @@
     the terms of the GNU General Public License (version 2) as published by the\r
     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
 \r
-    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
-    >>! a combined work that includes FreeRTOS without being obliged to provide\r
-    >>! the source code for proprietary components outside of the FreeRTOS\r
-    >>! kernel.\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
 \r
     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
@@ -71,8 +72,6 @@
        EXTERN vTaskSwitchContext\r
 \r
        PUBLIC xPortPendSVHandler\r
-       PUBLIC ulPortSetInterruptMask\r
-       PUBLIC vPortClearInterruptMask\r
        PUBLIC vPortSVCHandler\r
        PUBLIC vPortStartFirstTask\r
        PUBLIC vPortEnableVFP\r
@@ -81,11 +80,11 @@
 /*-----------------------------------------------------------*/\r
 \r
 xPortPendSVHandler:\r
-       mrs r0, psp                                             \r
-       \r
+       mrs r0, psp\r
+       isb\r
        /* Get the location of the current TCB. */\r
-       ldr     r3, =pxCurrentTCB                       \r
-       ldr     r2, [r3]                                                \r
+       ldr     r3, =pxCurrentTCB\r
+       ldr     r2, [r3]\r
 \r
        /* Is the task using the FPU context?  If so, push high vfp registers. */\r
        tst r14, #0x10\r
@@ -93,49 +92,45 @@ xPortPendSVHandler:
        vstmdbeq r0!, {s16-s31}\r
 \r
        /* Save the core registers. */\r
-       stmdb r0!, {r4-r11, r14}                                \r
-       \r
+       stmdb r0!, {r4-r11, r14}\r
+\r
        /* Save the new top of stack into the first member of the TCB. */\r
        str r0, [r2]\r
-       \r
-       stmdb sp!, {r3, r14}\r
+\r
+       stmdb sp!, {r3}\r
        mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
        msr basepri, r0\r
-       bl vTaskSwitchContext                   \r
+       dsb\r
+       isb\r
+       bl vTaskSwitchContext\r
        mov r0, #0\r
        msr basepri, r0\r
-       ldmia sp!, {r3, r14}\r
+       ldmia sp!, {r3}\r
 \r
        /* The first item in pxCurrentTCB is the task top of stack. */\r
-       ldr r1, [r3]    \r
+       ldr r1, [r3]\r
        ldr r0, [r1]\r
-       \r
+\r
        /* Pop the core registers. */\r
        ldmia r0!, {r4-r11, r14}\r
 \r
-       /* Is the task using the FPU context?  If so, pop the high vfp registers \r
+       /* Is the task using the FPU context?  If so, pop the high vfp registers\r
        too. */\r
        tst r14, #0x10\r
        it eq\r
        vldmiaeq r0!, {s16-s31}\r
-       \r
-       msr psp, r0                                             \r
-       bx r14                                                  \r
-\r
 \r
-/*-----------------------------------------------------------*/\r
+       msr psp, r0\r
+       isb\r
+       #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */\r
+               #if WORKAROUND_PMU_CM001 == 1\r
+                       push { r14 }\r
+                       pop { pc }\r
+               #endif\r
+       #endif\r
 \r
-ulPortSetInterruptMask:\r
-       mrs r0, basepri\r
-       mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
-       msr basepri, r1\r
        bx r14\r
-       \r
-/*-----------------------------------------------------------*/\r
 \r
-vPortClearInterruptMask:\r
-       msr basepri, r0\r
-       bx r14\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
@@ -147,8 +142,9 @@ vPortSVCHandler:
        /* Pop the core registers. */\r
        ldmia r0!, {r4-r11, r14}\r
        msr psp, r0\r
+       isb\r
        mov r0, #0\r
-       msr     basepri, r0     \r
+       msr     basepri, r0\r
        bx r14\r
 \r
 /*-----------------------------------------------------------*/\r
@@ -162,6 +158,9 @@ vPortStartFirstTask
        msr msp, r0\r
        /* Call SVC to start the first task. */\r
        cpsie i\r
+       cpsie f\r
+       dsb\r
+       isb\r
        svc 0\r
 \r
 /*-----------------------------------------------------------*/\r
@@ -170,13 +169,13 @@ vPortEnableVFP:
        /* The FPU enable bits are in the CPACR. */\r
        ldr.w r0, =0xE000ED88\r
        ldr     r1, [r0]\r
-       \r
+\r
        /* Enable CP10 and CP11 coprocessors, then save back. */\r
        orr     r1, r1, #( 0xf << 20 )\r
        str r1, [r0]\r
-       bx      r14     \r
-       \r
+       bx      r14\r
+\r
 \r
 \r
        END\r
-       \r
+\r