/*\r
- FreeRTOS V7.4.1 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
\r
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
***************************************************************************\r
\r
\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
license and Real Time Engineers Ltd. contact details.\r
\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
fully thread aware and reentrant UDP/IP stack.\r
\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
- Integrity Systems, who sell the code with commercial support, \r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems, who sell the code with commercial support,\r
indemnification and middleware, under the OpenRTOS brand.\r
- \r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
- engineered and independently SIL3 certified version for use in safety and \r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
mission critical applications that require provable dependability.\r
*/\r
\r
typedef unsigned portLONG portTickType;\r
#define portMAX_DELAY ( portTickType ) 0xffffffff\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Scheduler utilities. */\r
extern void vPortYield( void );\r
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )\r
#define portYIELD() vPortYield()\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
+#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specific optimisations. */\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask( x )\r
/*-----------------------------------------------------------*/\r
\r
-/* There are an uneven number of items on the initial stack, so \r
-portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */\r
-#define portALIGNMENT_ASSERT_pxCurrentTCB ( void )\r
-/*-----------------------------------------------------------*/\r
-\r
/* Tickless idle/low power functionality. */\r
#ifndef portSUPPRESS_TICKS_AND_SLEEP\r
extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );\r
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
/*-----------------------------------------------------------*/\r
\r
+#ifdef configASSERT\r
+ void vPortValidateInterruptPriority( void );\r
+ #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()\r
+#else\r
+ #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()\r
+#endif\r
+\r
/* portNOP() is not required by this port. */\r
#define portNOP()\r
\r