RISC-V port updates: The machine timer compare register can now be for any HART...

[freertos] / FreeRTOS / Source / portable / IAR / RISC-V / portASM.s

diff --git a/FreeRTOS/Source/portable/IAR/RISC-V/portASM.s b/FreeRTOS/Source/portable/IAR/RISC-V/portASM.s
index 9e004dea3af1911c3e237d3267b3321b0bbefd6d..84cf6c950d4f02364152fa9e78f8cd3b99c33c8e 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/RISC-V/portASM.s
+++ b/FreeRTOS/Source/portable/IAR/RISC-V/portASM.s
@@ -110,7 +110,7 @@ at the top of this file. */
 /*-----------------------------------------------------------*/\r
 \r
        SECTION `.text`:CODE:NOROOT(2)\r
-    CODE\r
+       CODE\r
 \r
 freertos_risc_v_trap_handler:\r
        addi sp, sp, -portCONTEXT_SIZE\r
@@ -177,10 +177,12 @@ handle_asynchronous:
                #if( __riscv_xlen == 32 )\r
 \r
                        /* Update the 64-bit mtimer compare match value in two 32-bit writes. */\r
+                       li t4, -1\r
                        lw t2, 0(t1)                            /* Load the low word of ullNextTime into t2. */\r
                        lw t3, 4(t1)                            /* Load the high word of ullNextTime into t3. */\r
+                       sw t4, 0(t0)                            /* Low word no smaller than old value. */\r
+                       sw t3, 4(t0)                            /* Store high word of ullNextTime into compare register.  No smaller than new value. */\r
                        sw t2, 0(t0)                            /* Store low word of ullNextTime into compare register. */\r
-                       sw t3, 4(t0)                            /* Store high word of ullNextTime into compare register. */\r
                        lw t0, uxTimerIncrementsForOneTick      /* Load the value of ullTimerIncrementForOneTick into t0 (could this be optimized by storing in an array next to pullNextTime?). */\r
                        add t4, t0, t2                          /* Add the low word of ullNextTime to the timer increments for one tick (assumes timer increment for one tick fits in 32-bits). */\r
                        sltu t5, t4, t2                         /* See if the sum of low words overflowed (what about the zero case?). */\r