Added YRDKRL78G14 build configuration to the IAR RL78 demo.

[freertos] / FreeRTOS / Source / portable / IAR / RL78 / port.c

diff --git a/FreeRTOS/Source/portable/IAR/RL78/port.c b/FreeRTOS/Source/portable/IAR/RL78/port.c
index 584cafaccf2342f034fd0e390b12b40530887c12..1ea23611c2c1809eb3b76c817a7f0b9848a69736 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/RL78/port.c
+++ b/FreeRTOS/Source/portable/IAR/RL78/port.c
@@ -56,19 +56,19 @@
     ***************************************************************************\r
 \r
 \r
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
     license and Real Time Engineers Ltd. contact details.\r
 \r
     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
     including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
     fully thread aware and reentrant UDP/IP stack.\r
 \r
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
-    Integrity Systems, who sell the code with commercial support, \r
+    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+    Integrity Systems, who sell the code with commercial support,\r
     indemnification and middleware, under the OpenRTOS brand.\r
-    \r
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
-    engineered and independently SIL3 certified version for use in safety and \r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
     mission critical applications that require provable dependability.\r
 */\r
 \r
@@ -233,32 +233,32 @@ const unsigned short usClockHz = 15000UL; /* Internal clock. */
 const unsigned short usCompareMatch = ( usClockHz / configTICK_RATE_HZ ) + 1UL;\r
 \r
        /* Use the internal 15K clock. */\r
-       OSMC = 0x16U;\r
+       OSMC = ( unsigned char ) 0x16;\r
 \r
        /* Supply the RTC clock. */\r
-       RTCEN = 1U;\r
+       RTCEN = ( unsigned char ) 1U;\r
        \r
        /* Disable ITMC operation. */\r
-       ITMC = 0x0000;\r
+       ITMC = ( unsigned char ) 0x0000;\r
        \r
        /* Disable INTIT interrupt. */\r
-       ITMK = 1U;\r
+       ITMK = ( unsigned char ) 1;\r
        \r
        /* Set INTIT high priority */\r
-       ITPR1 = 1U;\r
-       ITPR0 = 1U;\r
+       ITPR1 = ( unsigned char ) 1;\r
+       ITPR0 = ( unsigned char ) 1;\r
        \r
-       /* Set interval. */\r
-       ITMC = usCompareMatch;\r
-\r
        /* Clear INIT interrupt. */\r
-       ITIF = 0U;\r
+       ITIF = ( unsigned char ) 0;\r
+\r
+       /* Set interval and enable interrupt operation. */\r
+       ITMC = usCompareMatch | 0x8000U;\r
        \r
        /* Enable INTIT interrupt. */\r
-       ITMK = 0U;\r
+       ITMK = ( unsigned char ) 0;\r
        \r
        /* Enable IT operation. */\r
-       ITMC |= 0x8000;\r
+//     ITMC |= 0x8000;\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r