/*\r
- FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ All rights reserved\r
\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
***************************************************************************\r
* *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
* *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
* *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * Thank you! *\r
* *\r
***************************************************************************\r
\r
-\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
\r
- >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel.\r
+ >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+ >>! a combined work that includes FreeRTOS without being obliged to provide\r
+ >>! the source code for proprietary components outside of the FreeRTOS\r
+ >>! kernel.\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
- details. You should have received a copy of the GNU General Public License\r
- and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
- viewed here: http://www.freertos.org/a00114.html and also obtained by\r
- writing to Real Time Engineers Ltd., contact details for whom are available\r
- on the FreeRTOS WEB site.\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
\r
1 tab == 4 spaces!\r
\r
* *\r
***************************************************************************\r
\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
license and Real Time Engineers Ltd. contact details.\r
\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
- fully thread aware and reentrant UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
- Integrity Systems, who sell the code with commercial support, \r
- indemnification and middleware, under the OpenRTOS brand.\r
- \r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
- engineered and independently SIL3 certified version for use in safety and \r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
*/\r
\r
-#include <p32xxxx.h>\r
+#include <xc.h>\r
#include <sys/asm.h>\r
#include "ISR_Support.h"\r
\r
\r
.set noreorder\r
.set noat\r
- .ent xPortStartScheduler\r
+ .ent vPortStartFirstTask\r
\r
vPortStartFirstTask:\r
\r
created so far. */\r
portRESTORE_CONTEXT\r
\r
- .end xPortStartScheduler\r
+ .end vPortStartFirstTask\r
\r
\r
\r
/*******************************************************************/\r
\r
- .set noreorder\r
+ .set noreorder\r
.set noat\r
- .ent vPortYieldISR\r
+ .ent vPortYieldISR\r
\r
vPortYieldISR:\r
\r
- /* Make room for the context. First save the current status so we can\r
- manipulate it, and the cause and EPC registers so we capture their\r
- original values in case of interrupt nesting. */\r
- mfc0 k0, _CP0_CAUSE\r
- addiu sp, sp, -portCONTEXT_SIZE\r
+ /* Make room for the context. First save the current status so it can be\r
+ manipulated. */\r
+ addiu sp, sp, -portCONTEXT_SIZE\r
mfc0 k1, _CP0_STATUS\r
\r
- /* Also save s6 and s5 so we can use them during this interrupt. Any\r
- nesting interrupts should maintain the values of these registers\r
- across the ISR. */\r
+ /* Also save s6 and s5 so they can be used. Any nesting interrupts should\r
+ maintain the values of these registers across the ISR. */\r
sw s6, 44(sp)\r
sw s5, 40(sp)\r
sw k1, portSTATUS_STACK_LOCATION(sp)\r
\r
- /* Enable interrupts above the current priority. */\r
- srl k0, k0, 0xa\r
- ins k1, k0, 10, 6\r
+ /* Prepare to re-enabled interrupt above the kernel priority. */\r
+ ins k1, zero, 10, 6\r
+ ori k1, k1, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 )\r
ins k1, zero, 1, 4\r
\r
/* s5 is used as the frame pointer. */\r
after interrupts are enabled. */\r
mfc0 s6, _CP0_EPC\r
\r
- /* Re-enable interrupts. */\r
+ /* Re-enable interrupts above configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
mtc0 k1, _CP0_STATUS\r
\r
/* Save the context into the space just created. s6 is saved again\r
here as it now contains the EPC value. */\r
- sw ra, 120(s5)\r
+ sw ra, 120(s5)\r
sw s8, 116(s5)\r
sw t9, 112(s5)\r
- sw t8, 108(s5)\r
- sw t7, 104(s5)\r
+ sw t8, 108(s5)\r
+ sw t7, 104(s5)\r
sw t6, 100(s5)\r
sw t5, 96(s5)\r
sw t4, 92(s5)\r
sw s7, 48(s5)\r
sw s6, portEPC_STACK_LOCATION(s5)\r
/* s5 and s6 has already been saved. */\r
- sw s4, 36(s5)\r
+ sw s4, 36(s5)\r
sw s3, 32(s5)\r
sw s2, 28(s5)\r
sw s1, 24(s5)\r
is below configMAX_SYSCALL_INTERRUPT_PRIORITY - so this can only ever\r
raise the IPL value and never lower it. */\r
di\r
+ ehb\r
mfc0 s7, _CP0_STATUS\r
- ins s7, $0, 10, 6\r
+ ins s7, zero, 10, 6\r
ori s6, s7, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 ) | 1\r
\r
/* This mtc0 re-enables interrupts, but only above\r
configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
mtc0 s6, _CP0_STATUS\r
+ ehb\r
\r
/* Clear the software interrupt in the core. */\r
mfc0 s6, _CP0_CAUSE\r
ins s6, zero, 8, 1\r
mtc0 s6, _CP0_CAUSE\r
+ ehb\r
\r
/* Clear the interrupt in the interrupt controller. */\r
la s6, IFS0CLR\r
\r
/* Clear the interrupt mask again. The saved status value is still in s7. */\r
mtc0 s7, _CP0_STATUS\r
+ ehb\r
\r
/* Restore the stack pointer from the TCB. */\r
la s0, pxCurrentTCB\r
\r
/* Protect access to the k registers, and others. */\r
di\r
+ ehb\r
\r
/* Set nesting back to zero. As the lowest priority interrupt this\r
interrupt cannot have nested. */\r
lw k0, portEPC_STACK_LOCATION(sp)\r
\r
/* Remove stack frame. */\r
- addiu sp, sp, portCONTEXT_SIZE\r
+ addiu sp, sp, portCONTEXT_SIZE\r
\r
mtc0 k1, _CP0_STATUS\r
mtc0 k0, _CP0_EPC\r
+ ehb\r
eret\r
nop\r
\r