/*\r
- FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
- \r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
- * *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
- * *\r
- ***************************************************************************\r
+ FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.\r
+ All rights reserved\r
\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
- >>>NOTE<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
- more details. You should have received a copy of the GNU General Public\r
- License and the FreeRTOS license exception along with FreeRTOS; if not it\r
- can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
- by writing to Richard Barry, contact details for whom are available on the\r
- FreeRTOS WEB site.\r
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
+\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
+ link: http://www.freertos.org/a00114.html\r
\r
- 1 tab == 4 spaces!\r
- \r
***************************************************************************\r
* *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong? *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
* *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
* *\r
***************************************************************************\r
\r
- \r
- http://www.FreeRTOS.org - Documentation, training, latest information, \r
- license and contact details.\r
- \r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool.\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
\r
- Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
- the code with commercial support, indemnification, and middleware, under \r
- the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
- provide a safety engineered and independently SIL3 certified version under \r
- the SafeRTOS brand: http://www.SafeRTOS.com.\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
*/\r
\r
#ifndef PORTMACRO_H\r
#define PORTMACRO_H\r
\r
/* System include files */\r
-#include <plib.h>\r
+#include <xc.h>\r
\r
#ifdef __cplusplus\r
extern "C" {\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned long\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned long portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
+\r
+ /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\r
+ not need to be guarded with a critical section. */\r
+ #define portTICK_TYPE_IS_ATOMIC 1\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 8\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section management. */\r
#define portALL_IPL_BITS ( 0x3fUL << portIPL_SHIFT )\r
#define portSW0_BIT ( 0x01 << 8 )\r
\r
-/* This clears the IPL bits, then sets them to \r
-configMAX_SYSCALL_INTERRUPT_PRIORITY. This function should not be called\r
-from an interrupt, so therefore will not be called with an IPL setting\r
-above configMAX_SYSCALL_INTERRUPT_PRIORITY. Therefore, when used correctly, the \r
-instructions in this macro can only result in the IPL being raised, and \r
-therefore never lowered. */\r
-#define portDISABLE_INTERRUPTS() \\r
-{ \\r
-unsigned long ulStatus; \\r
- \\r
- /* Mask interrupts at and below the kernel interrupt priority. */ \\r
- ulStatus = _CP0_GET_STATUS(); \\r
- ulStatus &= ~portALL_IPL_BITS; \\r
- _CP0_SET_STATUS( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \\r
-}\r
+/* This clears the IPL bits, then sets them to\r
+configMAX_SYSCALL_INTERRUPT_PRIORITY. An extra check is performed if\r
+configASSERT() is defined to ensure an assertion handler does not inadvertently\r
+attempt to lower the IPL when the call to assert was triggered because the IPL\r
+value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY when an ISR\r
+safe FreeRTOS API function was executed. ISR safe FreeRTOS API functions are\r
+those that end in FromISR. FreeRTOS maintains a separate interrupt API to\r
+ensure API function and interrupt entry is as fast and as simple as possible. */\r
+#ifdef configASSERT\r
+ #define portDISABLE_INTERRUPTS() \\r
+ { \\r
+ uint32_t ulStatus; \\r
+ \\r
+ /* Mask interrupts at and below the kernel interrupt priority. */ \\r
+ ulStatus = _CP0_GET_STATUS(); \\r
+ \\r
+ /* Is the current IPL below configMAX_SYSCALL_INTERRUPT_PRIORITY? */ \\r
+ if( ( ( ulStatus & portALL_IPL_BITS ) >> portIPL_SHIFT ) < configMAX_SYSCALL_INTERRUPT_PRIORITY ) \\r
+ { \\r
+ ulStatus &= ~portALL_IPL_BITS; \\r
+ _CP0_SET_STATUS( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \\r
+ } \\r
+ }\r
+#else /* configASSERT */\r
+ #define portDISABLE_INTERRUPTS() \\r
+ { \\r
+ uint32_t ulStatus; \\r
+ \\r
+ /* Mask interrupts at and below the kernel interrupt priority. */ \\r
+ ulStatus = _CP0_GET_STATUS(); \\r
+ ulStatus &= ~portALL_IPL_BITS; \\r
+ _CP0_SET_STATUS( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \\r
+ }\r
+#endif /* configASSERT */\r
\r
#define portENABLE_INTERRUPTS() \\r
{ \\r
-unsigned long ulStatus; \\r
+uint32_t ulStatus; \\r
\\r
/* Unmask all interrupts. */ \\r
ulStatus = _CP0_GET_STATUS(); \\r
#define portENTER_CRITICAL() vTaskEnterCritical()\r
#define portEXIT_CRITICAL() vTaskExitCritical()\r
\r
-extern unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR();\r
-extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );\r
+extern UBaseType_t uxPortSetInterruptMaskFromISR();\r
+extern void vPortClearInterruptMaskFromISR( UBaseType_t );\r
#define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) vPortClearInterruptMaskFromISR( uxSavedStatusRegister )\r
\r
+#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\r
+ #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
+#endif\r
+\r
+#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
+\r
+ /* Check the configuration. */\r
+ #if( configMAX_PRIORITIES > 32 )\r
+ #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.\r
+ #endif\r
+\r
+ /* Store/clear the ready priorities in a bit map. */\r
+ #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )\r
+ #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )\r
+\r
+ /*-----------------------------------------------------------*/\r
+\r
+ #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - _clz( ( uxReadyPriorities ) ) )\r
+\r
+#endif /* taskRECORD_READY_PRIORITY */\r
+\r
/*-----------------------------------------------------------*/\r
\r
/* Task utilities. */\r
\r
#define portYIELD() \\r
{ \\r
-unsigned long ulStatus; \\r
+uint32_t ulCause; \\r
\\r
/* Trigger software interrupt. */ \\r
- ulStatus = _CP0_GET_CAUSE(); \\r
- ulStatus |= portSW0_BIT; \\r
- _CP0_SET_CAUSE( ulStatus ); \\r
+ ulCause = _CP0_GET_CAUSE(); \\r
+ ulCause |= portSW0_BIT; \\r
+ _CP0_SET_CAUSE( ulCause ); \\r
}\r
\r
+extern volatile UBaseType_t uxInterruptNesting;\r
+#define portASSERT_IF_IN_ISR() configASSERT( uxInterruptNesting == 0 )\r
\r
-#define portNOP() asm volatile ( "nop" )\r
+#define portNOP() __asm volatile ( "nop" )\r
\r
/*-----------------------------------------------------------*/\r
\r