/*\r
- FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
-\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT \r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
- * *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
- * *\r
- ***************************************************************************\r
+ FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+ All rights reserved\r
\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
- >>>NOTE<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
- more details. You should have received a copy of the GNU General Public\r
- License and the FreeRTOS license exception along with FreeRTOS; if not it\r
- can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
- by writing to Richard Barry, contact details for whom are available on the\r
- FreeRTOS WEB site.\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
+ link: http://www.freertos.org/a00114.html\r
\r
- 1 tab == 4 spaces!\r
- \r
***************************************************************************\r
* *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
* *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
* *\r
***************************************************************************\r
\r
- \r
- http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
- and contact details. \r
- \r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool.\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
\r
- Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
- the code with commercial support, indemnification, and middleware, under \r
- the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
- provide a safety engineered and independently SIL3 certified version under \r
- the SafeRTOS brand: http://www.SafeRTOS.com.\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
*/\r
\r
#ifndef PORTMACRO_H\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE size_t\r
+#define portBASE_TYPE long\r
+#define portPOINTER_SIZE_TYPE size_t\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
+\r
+ /* 32/64-bit tick type on a 32/64-bit architecture, so reads of the tick\r
+ count do not need to be guarded with a critical section. */\r
+ #define portTICK_TYPE_IS_ATOMIC 1\r
#endif\r
\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
-#define portBYTE_ALIGNMENT 4\r
+#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
+#define portINLINE __inline\r
+\r
+#if defined( __x86_64__) || defined( _M_X64 )\r
+ #define portBYTE_ALIGNMENT 8\r
+#else\r
+ #define portBYTE_ALIGNMENT 4\r
+#endif\r
\r
#define portYIELD() vPortGenerateSimulatedInterrupt( portINTERRUPT_YIELD )\r
\r
+/* Simulated interrupts return pdFALSE if no context switch should be performed,\r
+or a non-zero number if a context switch should be performed. */\r
+#define portYIELD_FROM_ISR( x ) return x\r
+\r
+void vPortCloseRunningThread( void *pvTaskToDelete, volatile BaseType_t *pxPendYield );\r
void vPortDeleteThread( void *pvThreadToDelete );\r
#define portCLEAN_UP_TCB( pxTCB ) vPortDeleteThread( pxTCB )\r
-#define portDISABLE_INTERRUPTS()\r
-#define portENABLE_INTERRUPTS()\r
+#define portPRE_TASK_DELETE_HOOK( pvTaskToDelete, pxPendYield ) vPortCloseRunningThread( ( pvTaskToDelete ), ( pxPendYield ) )\r
+#define portDISABLE_INTERRUPTS() vPortEnterCritical()\r
+#define portENABLE_INTERRUPTS() vPortExitCritical()\r
\r
/* Critical section handling. */\r
void vPortEnterCritical( void );\r
#define portENTER_CRITICAL() vPortEnterCritical()\r
#define portEXIT_CRITICAL() vPortExitCritical()\r
\r
-#ifndef __GNUC__\r
- #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
+#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\r
+ #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
+#endif\r
+\r
+#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
\r
/* Check the configuration. */\r
#if( configMAX_PRIORITIES > 32 )\r
#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.\r
#endif\r
\r
- /* Store/clear the ready priorities in a bit map. */\r
- #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )\r
- #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )\r
+ /* Store/clear the ready priorities in a bit map. */\r
+ #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )\r
+ #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )\r
\r
\r
- /*-----------------------------------------------------------*/\r
+ /*-----------------------------------------------------------*/\r
\r
+ #ifdef __GNUC__\r
+ #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) \\r
+ __asm volatile( "mov %0, %%eax \n\t" \\r
+ "bsr %%eax, %%eax \n\t" \\r
+ "mov %%eax, %1 \n\t" \\r
+ :"=r"(uxTopPriority) : "r"(uxReadyPriorities) : "eax" )\r
+ #else\r
/* BitScanReverse returns the bit position of the most significant '1'\r
in the word. */\r
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) _BitScanReverse( ( DWORD * ) &( uxTopPriority ), ( uxReadyPriorities ) )\r
+ #endif /* __GNUC__ */\r
\r
- #endif /* taskRECORD_READY_PRIORITY */\r
-#endif /* __GNUC__ */\r
+#endif /* taskRECORD_READY_PRIORITY */\r
\r
+#ifndef __GNUC__\r
+ __pragma( warning( disable:4211 ) ) /* Nonstandard extension used, as extern is only nonstandard to MSVC. */\r
+#endif\r
\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )\r
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )\r
\r
-\r
#define portINTERRUPT_YIELD ( 0UL )\r
#define portINTERRUPT_TICK ( 1UL )\r
\r
-/* \r
+/*\r
* Raise a simulated interrupt represented by the bit mask in ulInterruptMask.\r
* Each bit can be used to represent an individual interrupt - with the first\r
* two bits being used for the Yield and Tick interrupts respectively.\r
*/\r
-void vPortGenerateSimulatedInterrupt( unsigned long ulInterruptNumber );\r
+void vPortGenerateSimulatedInterrupt( uint32_t ulInterruptNumber );\r
\r
/*\r
- * Install an interrupt handler to be called by the simulated interrupt handler \r
+ * Install an interrupt handler to be called by the simulated interrupt handler\r
* thread. The interrupt number must be above any used by the kernel itself\r
* (at the time of writing the kernel was using interrupt numbers 0, 1, and 2\r
- * as defined above). The number must also be lower than 32. \r
+ * as defined above). The number must also be lower than 32.\r
*\r
* Interrupt handler functions must return a non-zero value if executing the\r
- * handler resulted in a task switch being required. \r
+ * handler resulted in a task switch being required.\r
*/\r
-void vPortSetInterruptHandler( unsigned long ulInterruptNumber, unsigned long (*pvHandler)( void ) );\r
+void vPortSetInterruptHandler( uint32_t ulInterruptNumber, uint32_t (*pvHandler)( void ) );\r
\r
#endif\r
+\r