/*\r
- FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.\r
- \r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
- * *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
- * *\r
- ***************************************************************************\r
+ FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.\r
+ All rights reserved\r
\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
- >>>NOTE<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
- more details. You should have received a copy of the GNU General Public\r
- License and the FreeRTOS license exception along with FreeRTOS; if not it\r
- can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
- by writing to Richard Barry, contact details for whom are available on the\r
- FreeRTOS WEB site.\r
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
+\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
+ link: http://www.freertos.org/a00114.html\r
\r
- 1 tab == 4 spaces!\r
- \r
***************************************************************************\r
* *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong? *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
* *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
* *\r
***************************************************************************\r
\r
- \r
- http://www.FreeRTOS.org - Documentation, training, latest information, \r
- license and contact details.\r
- \r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool.\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
\r
- Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
- the code with commercial support, indemnification, and middleware, under \r
- the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
- provide a safety engineered and independently SIL3 certified version under \r
- the SafeRTOS brand: http://www.SafeRTOS.com.\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
*/\r
\r
\r
#include "task.h"\r
\r
/* Constants required to setup the initial task context. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )\r
\r
/* Constants required to setup the tick ISR. */\r
-#define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 )\r
+#define portENABLE_TIMER ( ( uint8_t ) 0x01 )\r
#define portPRESCALE_VALUE 0x00\r
-#define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 )\r
-#define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 )\r
+#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )\r
+#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )\r
\r
/* Constants required to setup the VIC for the tick ISR. */\r
-#define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 )\r
-#define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 )\r
-#define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )\r
+#define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )\r
+#define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )\r
+#define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )\r
\r
/* Constants required to handle interrupts. */\r
-#define portTIMER_MATCH_ISR_BIT ( ( unsigned portCHAR ) 0x01 )\r
-#define portCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )\r
+#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )\r
+#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )\r
\r
/*-----------------------------------------------------------*/\r
\r
track of the critical section nesting. This variable has to be stored\r
as part of the task context and must be initialised to a non zero value. */\r
\r
-#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )\r
-volatile unsigned portLONG ulCriticalNesting = 9999UL;\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
\r
/*-----------------------------------------------------------*/\r
\r
/* \r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
/* Setup the initial stack of the task. The stack is set exactly as \r
expected by the portRESTORE_CONTEXT() macro.\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The last thing onto the stack is the status register, which is set for\r
system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
- if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL )\r
+ if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )\r
{\r
/* We want the task to start in thumb mode. */\r
*pxTopOfStack |= portTHUMB_MODE_BIT;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Start the timer that generates the tick ISR. */\r
prvSetupTimerInterrupt();\r
{\r
/* Increment the tick count - this may make a delaying task ready\r
to run - but a context switch is not performed. */ \r
- vTaskIncrementTick();\r
+ xTaskIncrementTick();\r
\r
T0IR = portTIMER_MATCH_ISR_BIT; /* Clear the timer event */\r
VICVectAddr = portCLEAR_VIC_INTERRUPT; /* Acknowledge the Interrupt */\r
\r
static void prvSetupTimerInterrupt( void )\r
{\r
-unsigned portLONG ulCompareMatch;\r
+uint32_t ulCompareMatch;\r
\r
/* A 1ms tick does not require the use of the timer prescale. This is\r
defaulted to zero but can be used if necessary. */\r
scheduler is being used. */\r
#if configUSE_PREEMPTION == 1\r
{ \r
- VICVectAddr0 = ( unsigned portLONG ) vPreemptiveTick;\r
+ VICVectAddr0 = ( uint32_t ) vPreemptiveTick;\r
}\r
#else\r
{\r
- VICVectAddr0 = ( unsigned portLONG ) vNonPreemptiveTick;\r
+ VICVectAddr0 = ( uint32_t ) vNonPreemptiveTick;\r
}\r
#endif\r
\r