#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )\r
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )\r
\r
-#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
-#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
+#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
+#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
+\r
+/* Constants required to check the validity of an interrupt prority. */\r
+#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )\r
+#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )\r
+#define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )\r
+#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )\r
\r
/* Constants required to manipulate the VFP. */\r
#define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */\r
/* Constants used with memory barrier intrinsics. */\r
#define portSY_FULL_READ_WRITE ( 15 )\r
\r
+/* The systick is a 24-bit counter. */\r
+#define portMAX_24_BIT_NUMBER ( 0xffffffUL )\r
+\r
+/* A fiddle factor to estimate the number of SysTick counts that would have\r
+occurred while the SysTick counter is stopped during tickless idle\r
+calculations. */\r
+#define portMISSED_COUNTS_FACTOR ( 45UL )\r
+\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
* The number of SysTick increments that make up one tick period.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long ulTimerReloadValueForOneTick = 0;\r
-#endif\r
+ static unsigned long ulTimerCountsForOneTick = 0;\r
+#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* The maximum number of tick periods that can be suppressed is limited by the\r
static unsigned long ulStoppedTimerCompensation = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
+/*\r
+ * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure \r
+ * FreeRTOS API functions are not called from interrupts that have been assigned\r
+ * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
+ */\r
+#if ( configASSERT_DEFINED == 1 )\r
+ static unsigned char ucMaxSysCallPriority = 0;\r
+ static const volatile unsigned char * const pcInterruptPriorityRegisters = ( unsigned char * ) portNVIC_IP_REGISTERS_OFFSET_16;\r
+#endif /* configASSERT_DEFINED */\r
+\r
/*-----------------------------------------------------------*/\r
\r
/*\r
*/\r
portBASE_TYPE xPortStartScheduler( void )\r
{\r
- /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
+ #if( configASSERT_DEFINED == 1 )\r
+ {\r
+ volatile unsigned long ulOriginalPriority;\r
+ volatile char * const pcFirstUserPriorityRegister = ( char * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
+\r
+ /* Determine the maximum priority from which ISR safe FreeRTOS API\r
+ functions can be called. ISR safe functions are those that end in\r
+ "FromISR". FreeRTOS maintains separate thread and ISR API functions to\r
+ ensure interrupt entry is as fast and simple as possible.\r
+\r
+ Save the interrupt priority value that is about to be clobbered. */\r
+ ulOriginalPriority = *pcFirstUserPriorityRegister;\r
+\r
+ /* Write the configMAX_SYSCALL_INTERRUPT_PRIORITY value to an interrupt\r
+ priority register. */\r
+ *pcFirstUserPriorityRegister = configMAX_SYSCALL_INTERRUPT_PRIORITY;\r
+\r
+ /* Read back the written priority to obtain its value as seen by the\r
+ hardware, which will only implement a subset of the priority bits. */\r
+ ucMaxSysCallPriority = *pcFirstUserPriorityRegister;\r
+\r
+ /* Restore the clobbered interrupt priority register to its original\r
+ value. */\r
+ *pcFirstUserPriorityRegister = ulOriginalPriority;\r
+ }\r
+ #endif /* conifgASSERT_DEFINED */\r
+\r
+ /* Make PendSV and SysTick the lowest priority interrupts. */\r
portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;\r
portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;\r
\r
\r
void xPortSysTickHandler( void )\r
{\r
- #if configUSE_PREEMPTION == 1\r
- {\r
- /* If using preemption, also force a context switch. */\r
- portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
- }\r
- #endif\r
-\r
- /* Only reset the systick load register if configUSE_TICKLESS_IDLE is set to\r
- 1. If it is set to 0 tickless idle is not being used. If it is set to a\r
- value other than 0 or 1 then a timer other than the SysTick is being used\r
- to generate the tick interrupt. */\r
- #if configUSE_TICKLESS_IDLE == 1\r
- portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick;\r
- #endif\r
-\r
+ /* The SysTick runs at the lowest interrupt priority, so when this interrupt\r
+ executes all interrupts must be unmasked. There is therefore no need to\r
+ save and then restore the interrupt mask value as its value is already\r
+ known. */\r
( void ) portSET_INTERRUPT_MASK_FROM_ISR();\r
{\r
- vTaskIncrementTick();\r
+ /* Increment the RTOS tick. */\r
+ if( xTaskIncrementTick() != pdFALSE )\r
+ {\r
+ /* A context switch is required. Context switching is performed in\r
+ the PendSV interrupt. Pend the PendSV interrupt. */\r
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
+ }\r
}\r
portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );\r
}\r
\r
__weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
{\r
- unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickIncrements;\r
+ unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;\r
portTickType xModifiableIdleTime;\r
\r
/* Make sure the SysTick reload value does not overflow the counter. */\r
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;\r
}\r
\r
- /* Calculate the reload value required to wait xExpectedIdleTime\r
- tick periods. -1 is used because this code will execute part way\r
- through one of the tick periods, and the fraction of a tick period is\r
- accounted for later. */\r
- ulReloadValue = ( ulTimerReloadValueForOneTick * ( xExpectedIdleTime - 1UL ) );\r
- if( ulReloadValue > ulStoppedTimerCompensation )\r
- {\r
- ulReloadValue -= ulStoppedTimerCompensation;\r
- }\r
-\r
/* Stop the SysTick momentarily. The time the SysTick is stopped for\r
is accounted for as best it can be, but using the tickless mode will\r
inevitably result in some tiny drift of the time maintained by the\r
kernel with respect to calendar time. */\r
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;\r
\r
- /* Adjust the reload value to take into account that the current\r
- time slice is already partially complete. */\r
- ulReloadValue += ( portNVIC_SYSTICK_LOAD_REG - ( portNVIC_SYSTICK_LOAD_REG - portNVIC_SYSTICK_CURRENT_VALUE_REG ) );\r
+ /* Calculate the reload value required to wait xExpectedIdleTime\r
+ tick periods. -1 is used because this code will execute part way\r
+ through one of the tick periods. */\r
+ ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );\r
+ if( ulReloadValue > ulStoppedTimerCompensation )\r
+ {\r
+ ulReloadValue -= ulStoppedTimerCompensation;\r
+ }\r
\r
/* Enter a critical section but don't use the taskENTER_CRITICAL()\r
method as that will mask interrupts that should exit sleep mode. */\r
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )\r
{\r
/* The tick interrupt has already executed, and the SysTick\r
- count reloaded with the portNVIC_SYSTICK_LOAD_REG value.\r
- Reset the portNVIC_SYSTICK_LOAD_REG with whatever remains of\r
- this tick period. */\r
- portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );\r
+ count reloaded with ulReloadValue. Reset the\r
+ portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick\r
+ period. */\r
+ portNVIC_SYSTICK_LOAD_REG = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );\r
\r
/* The tick interrupt handler will already have pended the tick\r
processing in the kernel. As the pending tick will be\r
else\r
{\r
/* Something other than the tick interrupt ended the sleep.\r
- Work out how long the sleep lasted. */\r
- ulCompletedSysTickIncrements = ( xExpectedIdleTime * ulTimerReloadValueForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;\r
+ Work out how long the sleep lasted rounded to complete tick\r
+ periods (not the ulReload value which accounted for part\r
+ ticks). */\r
+ ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;\r
\r
/* How many complete tick periods passed while the processor\r
was waiting? */\r
- ulCompleteTickPeriods = ulCompletedSysTickIncrements / ulTimerReloadValueForOneTick;\r
+ ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;\r
\r
/* The reload value is set to whatever fraction of a single tick\r
period remains. */\r
- portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerReloadValueForOneTick ) - ulCompletedSysTickIncrements;\r
+ portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;\r
}\r
\r
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG\r
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
\r
vTaskStepTick( ulCompleteTickPeriods );\r
+\r
+ /* The counter must start by the time the reload value is reset. */\r
+ configASSERT( portNVIC_SYSTICK_CURRENT_VALUE_REG );\r
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;\r
}\r
}\r
\r
/* Calculate the constants required to configure the tick interrupt. */\r
#if configUSE_TICKLESS_IDLE == 1\r
{\r
- ulTimerReloadValueForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
- xMaximumPossibleSuppressedTicks = 0xffffffUL / ( ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );\r
- ulStoppedTimerCompensation = 45UL / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );\r
+ ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );\r
+ xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;\r
+ ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );\r
}\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
msr basepri, r0\r
bx r14\r
}\r
+/*-----------------------------------------------------------*/\r
+\r
+__asm unsigned long vPortGetIPSR( void )\r
+{\r
+ PRESERVE8\r
+ \r
+ mrs r0, ipsr\r
+ bx r14\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+#if( configASSERT_DEFINED == 1 )\r
+\r
+ void vPortValidateInterruptPriority( void )\r
+ {\r
+ unsigned long ulCurrentInterrupt;\r
+ unsigned char ucCurrentPriority;\r
+\r
+ /* Obtain the number of the currently executing interrupt. */\r
+ ulCurrentInterrupt = vPortGetIPSR();\r
+\r
+ /* Is the interrupt number a user defined interrupt? */\r
+ if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )\r
+ {\r
+ /* Look up the interrupt's priority. */\r
+ ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];\r
+\r
+ /* The following assertion will fail if a service routine (ISR) for \r
+ an interrupt that has been assigned a priority above\r
+ configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API\r
+ function. ISR safe FreeRTOS API functions must *only* be called \r
+ from interrupts that have been assigned a priority at or below\r
+ configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
+ \r
+ Numerically low interrupt priority numbers represent logically high\r
+ interrupt priorities, therefore the priority of the interrupt must \r
+ be set to a value equal to or numerically *higher* than \r
+ configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
+ \r
+ Interrupts that use the FreeRTOS API must not be left at their\r
+ default priority of zero as that is the highest possible priority,\r
+ which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY, \r
+ and therefore also guaranteed to be invalid. \r
+ \r
+ FreeRTOS maintains separate thread and ISR API functions to ensure \r
+ interrupt entry is as fast and simple as possible.\r
+ \r
+ The following links provide detailed information:\r
+ http://www.freertos.org/RTOS-Cortex-M3-M4.html\r
+ http://www.freertos.org/FAQHelp.html */\r
+ configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );\r
+ }\r
+\r
+ /* Priority grouping: The interrupt controller (NVIC) allows the bits \r
+ that define each interrupt's priority to be split between bits that \r
+ define the interrupt's pre-emption priority bits and bits that define\r
+ the interrupt's sub-priority. For simplicity all bits must be defined \r
+ to be pre-emption priority bits. The following assertion will fail if\r
+ this is not the case (if some bits represent a sub-priority). \r
+ \r
+ If CMSIS libraries are being used then the correct setting can be \r
+ achieved by calling NVIC_SetPriorityGrouping( 0 ); before starting the \r
+ scheduler. */\r
+ configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) == 0 );\r
+ }\r
+ \r
+#endif /* configASSERT_DEFINED */\r
+\r
+\r
projects / freertos / blobdiff