Changes to core code and port layer:

[freertos] / FreeRTOS / Source / portable / RVDS / ARM_CM4_MPU / port.c

diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM4_MPU/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CM4_MPU/port.c
index 3cd92405651bef9e622790eb0e63fdf7201c53c2..8c7e1ae30038fed0982ea7b64ac20ecb55030127 100644 (file)
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM4_MPU/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM4_MPU/port.c
@@ -381,6 +381,24 @@ BaseType_t xPortStartScheduler( void )
                        ucMaxPriorityValue <<= ( uint8_t ) 0x01;\r
                }\r
 \r
+               #ifdef __NVIC_PRIO_BITS\r
+               {\r
+                       /* Check the CMSIS configuration that defines the number of\r
+                       priority bits matches the number of priority bits actually queried\r
+                       from the hardware. */\r
+                       configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );\r
+               }\r
+               #endif\r
+\r
+               #ifdef configPRIO_BITS\r
+               {\r
+                       /* Check the FreeRTOS configuration that defines the number of\r
+                       priority bits matches the number of priority bits actually queried\r
+                       from the hardware. */\r
+                       configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );\r
+               }\r
+               #endif\r
+\r
                /* Shift the priority group value back to its position within the AIRCR\r
                register. */\r
                ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;\r
@@ -426,11 +444,20 @@ __asm void prvStartFirstTask( void )
 {\r
        PRESERVE8\r
 \r
-       ldr r0, =0xE000ED08     /* Use the NVIC offset register to locate the stack. */\r
+       /* Use the NVIC offset register to locate the stack. */\r
+       ldr r0, =0xE000ED08\r
        ldr r0, [r0]\r
        ldr r0, [r0]\r
-       msr msp, r0                     /* Set the msp back to the start of the stack. */\r
-       cpsie i                         /* Globally enable interrupts. */\r
+       /* Set the msp back to the start of the stack. */\r
+       msr msp, r0\r
+       /* Clear the bit that indicates the FPU is in use in case the FPU was used\r
+       before the scheduler was started - which would otherwise result in the\r
+       unnecessary leaving of space in the SVC stack for lazy saving of FPU\r
+       registers. */\r
+       mov r0, #0\r
+       msr control, r0\r
+       /* Globally enable interrupts. */\r
+       cpsie i\r
        cpsie f\r
        dsb\r
        isb\r