Improvements to the Cortex-M ports:

[freertos] / FreeRTOS / Source / portable / RVDS / ARM_CM7 / r0p1 / port.c

diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1/port.c
index ef34402f689f7058b1802eabd226bbbbddbe259d..9f0dc3330ebd8076db67ee36f8bdc20604105d31 100644 (file)
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1/port.c
@@ -463,6 +463,9 @@ __asm void xPortPendSVHandler( void )
        /* Save the new top of stack into the first member of the TCB. */\r
        str r0, [r2]\r
 \r
+       /* Ensure thread safety of atomic operations. */\r
+       clrex\r
+\r
        stmdb sp!, {r3}\r
        mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
        cpsid i\r
@@ -695,6 +698,10 @@ void xPortSysTickHandler( void )
                }\r
                #endif /* configUSE_TICKLESS_IDLE */\r
 \r
+               /* Stop and clear the SysTick. */\r
+               portNVIC_SYSTICK_CTRL_REG = 0UL;\r
+               portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r
+\r
                /* Configure SysTick to interrupt at the requested rate. */\r
                portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
                portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );\r