/*\r
- FreeRTOS V7.4.1 - Copyright (C) 2013 Real Time Engineers Ltd.\r
-\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
- * *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
- * *\r
- ***************************************************************************\r
+ FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+ All rights reserved\r
\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
\r
- >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel.\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
- details. You should have received a copy of the GNU General Public License\r
- and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
- viewed here: http://www.freertos.org/a00114.html and also obtained by\r
- writing to Real Time Engineers Ltd., contact details for whom are available\r
- on the FreeRTOS WEB site.\r
-\r
- 1 tab == 4 spaces!\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
+ link: http://www.freertos.org/a00114.html\r
\r
***************************************************************************\r
* *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
* *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
* *\r
***************************************************************************\r
\r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
- license and Real Time Engineers Ltd. contact details.\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
- fully thread aware and reentrant UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
- Integrity Systems, who sell the code with commercial support, \r
- indemnification and middleware, under the OpenRTOS brand.\r
- \r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
- engineered and independently SIL3 certified version for use in safety and \r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
*/\r
\r
/*-----------------------------------------------------------\r
#include "task.h"\r
\r
/* Constants required to setup timer 2 to produce the RTOS tick. */\r
-#define portCLOCK_DIVISOR ( ( unsigned long ) 12 )\r
-#define portMAX_TIMER_VALUE ( ( unsigned long ) 0xffff )\r
-#define portENABLE_TIMER ( ( unsigned char ) 0x04 )\r
-#define portTIMER_2_INTERRUPT_ENABLE ( ( unsigned char ) 0x20 )\r
+#define portCLOCK_DIVISOR ( ( uint32_t ) 12 )\r
+#define portMAX_TIMER_VALUE ( ( uint32_t ) 0xffff )\r
+#define portENABLE_TIMER ( ( uint8_t ) 0x04 )\r
+#define portTIMER_2_INTERRUPT_ENABLE ( ( uint8_t ) 0x20 )\r
\r
/* The value used in the IE register when a task first starts. */\r
-#define portGLOBAL_INTERRUPT_BIT ( ( portSTACK_TYPE ) 0x80 )\r
+#define portGLOBAL_INTERRUPT_BIT ( ( StackType_t ) 0x80 )\r
\r
/* The value used in the PSW register when a task first starts. */\r
-#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00 )\r
+#define portINITIAL_PSW ( ( StackType_t ) 0x00 )\r
\r
/* Macro to clear the timer 2 interrupt flag. */\r
#define portCLEAR_INTERRUPT_FLAG() TMR2CN &= ~0x80;\r
\r
/* Used during a context switch to store the size of the stack being copied\r
to or from XRAM. */\r
-data static unsigned char ucStackBytes;\r
+data static uint8_t ucStackBytes;\r
\r
/* Used during a context switch to point to the next byte in XRAM from/to which\r
a RAM byte is to be copied. */\r
-xdata static portSTACK_TYPE * data pxXRAMStack;\r
+xdata static StackType_t * data pxXRAMStack;\r
\r
/* Used during a context switch to point to the next byte in RAM from/to which\r
an XRAM byte is to be copied. */\r
-data static portSTACK_TYPE * data pxRAMStack;\r
+data static StackType_t * data pxRAMStack;\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/*\r
* Setup the hardware to generate an interrupt off timer 2 at the required \r
/* pxCurrentTCB points to a TCB which itself points to the location into \\r
which the first stack byte should be copied. Set pxXRAMStack to point \\r
to the location into which the first stack byte is to be copied. */ \\r
- pxXRAMStack = ( xdata portSTACK_TYPE * ) *( ( xdata portSTACK_TYPE ** ) pxCurrentTCB ); \\r
+ pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \\r
\\r
/* Set pxRAMStack to point to the first byte to be coped from the stack. */ \\r
- pxRAMStack = ( data portSTACK_TYPE * data ) configSTACK_START; \\r
+ pxRAMStack = ( data StackType_t * data ) configSTACK_START; \\r
\\r
/* Calculate the size of the stack we are about to copy from the current \\r
stack pointer value. */ \\r
{ \\r
/* Setup the pointers as per portCOPY_STACK_TO_XRAM(), but this time to \\r
copy the data back out of XRAM and into the stack. */ \\r
- pxXRAMStack = ( xdata portSTACK_TYPE * ) *( ( xdata portSTACK_TYPE ** ) pxCurrentTCB ); \\r
- pxRAMStack = ( data portSTACK_TYPE * data ) ( configSTACK_START - 1 ); \\r
+ pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \\r
+ pxRAMStack = ( data StackType_t * data ) ( configSTACK_START - 1 ); \\r
\\r
/* The first value stored in XRAM was the size of the stack - i.e. the \\r
number of bytes we need to copy back. */ \\r
} while( ucStackBytes ); \\r
\\r
/* Restore the stack pointer ready to use the restored stack. */ \\r
- SP = ( unsigned char ) pxRAMStack; \\r
+ SP = ( uint8_t ) pxRAMStack; \\r
}\r
/*-----------------------------------------------------------*/\r
\r
/* \r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
-unsigned long ulAddress;\r
-portSTACK_TYPE *pxStartOfStack;\r
+uint32_t ulAddress;\r
+StackType_t *pxStartOfStack;\r
\r
/* Leave space to write the size of the stack as the first byte. */\r
pxStartOfStack = pxTopOfStack;\r
ISR. \r
\r
The return address that would have been pushed by the MCU. */\r
- ulAddress = ( unsigned long ) pxCode;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ulAddress;\r
+ ulAddress = ( uint32_t ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) ulAddress;\r
ulAddress >>= 8;\r
pxTopOfStack++;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress );\r
+ *pxTopOfStack = ( StackType_t ) ( ulAddress );\r
pxTopOfStack++;\r
\r
/* Next all the registers will have been pushed by portSAVE_CONTEXT(). */\r
\r
/* The function parameters will be passed in the DPTR and B register as\r
a three byte generic pointer is used. */\r
- ulAddress = ( unsigned long ) pvParameters;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* DPL */\r
+ ulAddress = ( uint32_t ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) ulAddress; /* DPL */\r
ulAddress >>= 8;\r
*pxTopOfStack++;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* DPH */\r
+ *pxTopOfStack = ( StackType_t ) ulAddress; /* DPH */\r
ulAddress >>= 8;\r
pxTopOfStack++;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* b */\r
+ *pxTopOfStack = ( StackType_t ) ulAddress; /* b */\r
pxTopOfStack++;\r
\r
/* The remaining registers are straight forward. */\r
the stack size byte as part of the stack size count.\r
\r
Finally we place the stack size at the beginning. */\r
- *pxStartOfStack = ( portSTACK_TYPE ) ( pxTopOfStack - pxStartOfStack );\r
+ *pxStartOfStack = ( StackType_t ) ( pxTopOfStack - pxStartOfStack );\r
\r
/* Unlike most ports, we return the start of the stack as this is where the\r
size of the stack is stored. */\r
/* \r
* See header file for description. \r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup timer 2 to generate the RTOS tick. */\r
prvSetupTimerInterrupt(); \r
portSAVE_CONTEXT();\r
portCOPY_STACK_TO_XRAM();\r
\r
- vTaskIncrementTick();\r
- vTaskSwitchContext();\r
+ if( xTaskIncrementTick() != pdFALSE )\r
+ {\r
+ vTaskSwitchContext();\r
+ }\r
\r
portCLEAR_INTERRUPT_FLAG();\r
portCOPY_XRAM_TO_STACK();\r
/* When using the cooperative scheduler the timer 2 ISR is only \r
required to increment the RTOS tick count. */\r
\r
- vTaskIncrementTick();\r
+ xTaskIncrementTick();\r
portCLEAR_INTERRUPT_FLAG();\r
}\r
#endif\r
\r
static void prvSetupTimerInterrupt( void )\r
{\r
-unsigned char ucOriginalSFRPage;\r
+uint8_t ucOriginalSFRPage;\r
\r
/* Constants calculated to give the required timer capture values. */\r
-const unsigned long ulTicksPerSecond = configCPU_CLOCK_HZ / portCLOCK_DIVISOR;\r
-const unsigned long ulCaptureTime = ulTicksPerSecond / configTICK_RATE_HZ;\r
-const unsigned long ulCaptureValue = portMAX_TIMER_VALUE - ulCaptureTime;\r
-const unsigned char ucLowCaptureByte = ( unsigned char ) ( ulCaptureValue & ( unsigned long ) 0xff );\r
-const unsigned char ucHighCaptureByte = ( unsigned char ) ( ulCaptureValue >> ( unsigned long ) 8 );\r
+const uint32_t ulTicksPerSecond = configCPU_CLOCK_HZ / portCLOCK_DIVISOR;\r
+const uint32_t ulCaptureTime = ulTicksPerSecond / configTICK_RATE_HZ;\r
+const uint32_t ulCaptureValue = portMAX_TIMER_VALUE - ulCaptureTime;\r
+const uint8_t ucLowCaptureByte = ( uint8_t ) ( ulCaptureValue & ( uint32_t ) 0xff );\r
+const uint8_t ucHighCaptureByte = ( uint8_t ) ( ulCaptureValue >> ( uint32_t ) 8 );\r
\r
/* NOTE: This uses a timer only present on 8052 architecture. */\r
\r
SFRPAGE = 0;\r
\r
/* TMR2CF can be left in its default state. */ \r
- TMR2CF = ( unsigned char ) 0;\r
+ TMR2CF = ( uint8_t ) 0;\r
\r
/* Setup the overflow reload value. */\r
RCAP2L = ucLowCaptureByte;\r
projects / freertos / blobdiff