+++ /dev/null
-/*\r
- * FreeRTOS Kernel V10.0.0\r
- * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
- *\r
- * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
- * this software and associated documentation files (the "Software"), to deal in\r
- * the Software without restriction, including without limitation the rights to\r
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
- * the Software, and to permit persons to whom the Software is furnished to do so,\r
- * subject to the following conditions:\r
- *\r
- * The above copyright notice and this permission notice shall be included in all\r
- * copies or substantial portions of the Software. If you wish to use our Amazon\r
- * FreeRTOS name, please do so in a fair use way that does not cause confusion.\r
- *\r
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
- *\r
- * http://www.FreeRTOS.org\r
- * http://aws.amazon.com/freertos\r
- *\r
- * 1 tab == 4 spaces!\r
- */\r
-\r
-/*-----------------------------------------------------------\r
- * Implementation of functions defined in portable.h for the ARM CM4F port.\r
- *----------------------------------------------------------*/\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-#ifdef SOFTDEVICE_PRESENT\r
-#include "nrf_soc.h"\r
-#include "app_util.h"\r
-#include "app_util_platform.h"\r
-#endif\r
-\r
-#if !(__FPU_USED) && !(__LINT__)\r
- #error This port can only be used when the project options are configured to enable hardware floating point support.\r
-#endif\r
-\r
-#if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0\r
- #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html\r
-#endif\r
-\r
-/* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7\r
-r0p1 port. */\r
-#define portCORTEX_M4_r0p1_ID ( 0x410FC241UL )\r
-\r
-/* Constants required to check the validity of an interrupt priority. */\r
-#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )\r
-#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )\r
-#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )\r
-\r
-/* Constants required to set up the initial stack. */\r
-#define portINITIAL_XPSR (((xPSR_Type){.b.T = 1}).w)\r
-#define portINITIAL_EXEC_RETURN ( 0xfffffffd )\r
-\r
-/* Let the user override the pre-loading of the initial LR with the address of\r
-prvTaskExitError() in case is messes up unwinding of the stack in the\r
-debugger. */\r
-#ifdef configTASK_RETURN_ADDRESS\r
- #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS\r
-#else\r
- #define portTASK_RETURN_ADDRESS prvTaskExitError\r
-#endif\r
-\r
-/* Each task maintains its own interrupt status in the critical nesting\r
-variable. */\r
-static UBaseType_t uxCriticalNesting = 0;\r
-\r
-/*\r
- * Setup the timer to generate the tick interrupts. The implementation in this\r
- * file is weak to allow application writers to change the timer used to\r
- * generate the tick interrupt.\r
- */\r
-extern void vPortSetupTimerInterrupt( void );\r
-\r
-/*\r
- * Exception handlers.\r
- */\r
-void xPortSysTickHandler( void );\r
-\r
-/*\r
- * Start first task is a separate function so it can be tested in isolation.\r
- */\r
-extern void vPortStartFirstTask( void );\r
-\r
-/*\r
- * Function to enable the VFP.\r
- */\r
-static void vPortEnableVFP( void );\r
-\r
-/*\r
- * Used to catch tasks that attempt to return from their implementing function.\r
- */\r
-static void prvTaskExitError( void );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure\r
- * FreeRTOS API functions are not called from interrupts that have been assigned\r
- * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
- */\r
-#if ( configASSERT_DEFINED == 1 )\r
- static uint8_t ucMaxSysCallPriority = 0;\r
- static uint32_t ulMaxPRIGROUPValue = 0;\r
-#endif /* configASSERT_DEFINED */\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * See header file for description.\r
- */\r
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
-{\r
- /* Simulate the stack frame as it would be created by a context switch\r
- interrupt. */\r
-\r
- /* Offset added to account for the way the MCU uses the stack on entry/exit\r
- of interrupts, and to ensure alignment. */\r
- pxTopOfStack--;\r
-\r
- *pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
- pxTopOfStack--;\r
- *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
- pxTopOfStack--;\r
- *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */\r
-\r
- /* Save code space by skipping register initialisation. */\r
- pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
- *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
-\r
- /* A save method is being used that requires each task to maintain its\r
- own exec return value. */\r
- pxTopOfStack--;\r
- *pxTopOfStack = portINITIAL_EXEC_RETURN;\r
-\r
- pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
-\r
- return pxTopOfStack;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvTaskExitError( void )\r
-{\r
- /* A function that implements a task must not exit or attempt to return to\r
- its caller as there is nothing to return to. If a task wants to exit it\r
- should instead call vTaskDelete( NULL ).\r
-\r
- Artificially force an assert() to be triggered if configASSERT() is\r
- defined, then stop here so application writers can catch the error. */\r
- configASSERT( uxCriticalNesting == ~0UL );\r
- portDISABLE_INTERRUPTS();\r
- for ( ;; );\r
-}\r
-\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * See header file for description.\r
- */\r
-BaseType_t xPortStartScheduler( void )\r
-{\r
- /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.\r
- See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */\r
- configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );\r
-\r
- /* This port is designed for nRF52, this is Cortex-M4 r0p1. */\r
- configASSERT( SCB->CPUID == portCORTEX_M4_r0p1_ID );\r
-\r
- #if ( configASSERT_DEFINED == 1 )\r
- {\r
- volatile uint32_t ulOriginalPriority;\r
- volatile uint8_t * const pucFirstUserPriorityRegister = &NVIC->IP[0];\r
- volatile uint8_t ucMaxPriorityValue;\r
-\r
- /* Determine the maximum priority from which ISR safe FreeRTOS API\r
- functions can be called. ISR safe functions are those that end in\r
- "FromISR". FreeRTOS maintains separate thread and ISR API functions to\r
- ensure interrupt entry is as fast and simple as possible.\r
-\r
- Save the interrupt priority value that is about to be clobbered. */\r
- ulOriginalPriority = *pucFirstUserPriorityRegister;\r
-\r
- /* Determine the number of priority bits available. First write to all\r
- possible bits. */\r
- *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;\r
-\r
- /* Read the value back to see how many bits stuck. */\r
- ucMaxPriorityValue = *pucFirstUserPriorityRegister;\r
-\r
- /* Use the same mask on the maximum system call priority. */\r
- ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;\r
-\r
- /* Calculate the maximum acceptable priority group value for the number\r
- of bits read back. */\r
- ulMaxPRIGROUPValue = SCB_AIRCR_PRIGROUP_Msk >> SCB_AIRCR_PRIGROUP_Pos;\r
- while ( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )\r
- {\r
- ulMaxPRIGROUPValue--;\r
- ucMaxPriorityValue <<= ( uint8_t ) 0x01;\r
- }\r
-\r
- /* Remove any bits that are more than actually existing. */\r
- ulMaxPRIGROUPValue &= SCB_AIRCR_PRIGROUP_Msk >> SCB_AIRCR_PRIGROUP_Pos;\r
-\r
- /* Restore the clobbered interrupt priority register to its original\r
- value. */\r
- *pucFirstUserPriorityRegister = ulOriginalPriority;\r
- }\r
- #endif /* conifgASSERT_DEFINED */\r
-\r
- /* Make PendSV the lowest priority interrupts. */\r
- NVIC_SetPriority(PendSV_IRQn, configKERNEL_INTERRUPT_PRIORITY);\r
-\r
- /* Start the timer that generates the tick ISR. Interrupts are disabled\r
- here already. */\r
- vPortSetupTimerInterrupt();\r
-\r
- /* Initialise the critical nesting count ready for the first task. */\r
- uxCriticalNesting = 0;\r
-\r
- /* Ensure the VFP is enabled - it should be anyway. */\r
- vPortEnableVFP();\r
-\r
- /* Lazy save always. */\r
- FPU->FPCCR |= FPU_FPCCR_ASPEN_Msk | FPU_FPCCR_LSPEN_Msk;\r
-\r
- /* Finally this port requires SEVONPEND to be active */\r
- SCB->SCR |= SCB_SCR_SEVONPEND_Msk;\r
-\r
- /* Start the first task. */\r
- vPortStartFirstTask();\r
-\r
- /* Should never get here as the tasks will now be executing! Call the task\r
- exit error function to prevent compiler warnings about a static function\r
- not being called in the case that the application writer overrides this\r
- functionality by defining configTASK_RETURN_ADDRESS. */\r
- prvTaskExitError();\r
-\r
- /* Should not get here! */\r
- return 0;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vPortEndScheduler( void )\r
-{\r
- /* Not implemented in ports where there is nothing to return to.\r
- Artificially force an assert. */\r
- configASSERT( uxCriticalNesting == 1000UL );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vPortEnterCritical( void )\r
-{\r
- portDISABLE_INTERRUPTS();\r
- uxCriticalNesting++;\r
-\r
- /* This is not the interrupt safe version of the enter critical function so\r
- assert() if it is being called from an interrupt context. Only API\r
- functions that end in "FromISR" can be used in an interrupt. Only assert if\r
- the critical nesting count is 1 to protect against recursive calls if the\r
- assert function also uses a critical section. */\r
- if ( uxCriticalNesting == 1 )\r
- {\r
- configASSERT( ( SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk ) == 0 );\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vPortExitCritical( void )\r
-{\r
- configASSERT( uxCriticalNesting );\r
- uxCriticalNesting--;\r
- if ( uxCriticalNesting == 0 )\r
- {\r
- portENABLE_INTERRUPTS();\r
- }\r
-}\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* This is a naked function. */\r
-static void vPortEnableVFP( void )\r
-{\r
- SCB->CPACR |= 0xf << 20;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-#if ( configASSERT_DEFINED == 1 )\r
-\r
- void vPortValidateInterruptPriority( void )\r
- {\r
- uint32_t ulCurrentInterrupt;\r
- uint8_t ucCurrentPriority;\r
- IPSR_Type ipsr;\r
-\r
- /* Obtain the number of the currently executing interrupt. */\r
- ipsr.w = __get_IPSR();\r
- ulCurrentInterrupt = ipsr.b.ISR;\r
-\r
- /* Is the interrupt number a user defined interrupt? */\r
- if ( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )\r
- {\r
- /* Look up the interrupt's priority. */\r
- ucCurrentPriority = NVIC->IP[ ulCurrentInterrupt - portFIRST_USER_INTERRUPT_NUMBER ];\r
-\r
- /* The following assertion will fail if a service routine (ISR) for\r
- an interrupt that has been assigned a priority above\r
- configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API\r
- function. ISR safe FreeRTOS API functions must *only* be called\r
- from interrupts that have been assigned a priority at or below\r
- configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
-\r
- Numerically low interrupt priority numbers represent logically high\r
- interrupt priorities, therefore the priority of the interrupt must\r
- be set to a value equal to or numerically *higher* than\r
- configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
-\r
- Interrupts that use the FreeRTOS API must not be left at their\r
- default priority of zero as that is the highest possible priority,\r
- which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,\r
- and therefore also guaranteed to be invalid.\r
-\r
- FreeRTOS maintains separate thread and ISR API functions to ensure\r
- interrupt entry is as fast and simple as possible.\r
-\r
- The following links provide detailed information:\r
- http://www.freertos.org/RTOS-Cortex-M3-M4.html\r
- http://www.freertos.org/FAQHelp.html */\r
- configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );\r
- }\r
-\r
- /* Priority grouping: The interrupt controller (NVIC) allows the bits\r
- that define each interrupt's priority to be split between bits that\r
- define the interrupt's pre-emption priority bits and bits that define\r
- the interrupt's sub-priority. For simplicity all bits must be defined\r
- to be pre-emption priority bits. The following assertion will fail if\r
- this is not the case (if some bits represent a sub-priority).\r
-\r
- If the application only uses CMSIS libraries for interrupt\r
- configuration then the correct setting can be achieved on all Cortex-M\r
- devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the\r
- scheduler. Note however that some vendor specific peripheral libraries\r
- assume a non-zero priority group setting, in which cases using a value\r
- of zero will result in unpredicable behaviour. */\r
- configASSERT( NVIC_GetPriorityGrouping() <= ulMaxPRIGROUPValue );\r
- }\r
-\r
-#endif /* configASSERT_DEFINED */\r
projects / freertos / blobdiff