/*\r
- FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+ All rights reserved\r
\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
***************************************************************************\r
* *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
* *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
* *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * Thank you! *\r
* *\r
***************************************************************************\r
\r
-\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
\r
- >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel.\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
- details. You should have received a copy of the GNU General Public License\r
- and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
- viewed here: http://www.freertos.org/a00114.html and also obtained by\r
- writing to Real Time Engineers Ltd., contact details for whom are available\r
- on the FreeRTOS WEB site.\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
\r
1 tab == 4 spaces!\r
\r
* *\r
***************************************************************************\r
\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
license and Real Time Engineers Ltd. contact details.\r
\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
- fully thread aware and reentrant UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
- Integrity Systems, who sell the code with commercial support, \r
- indemnification and middleware, under the OpenRTOS brand.\r
- \r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
- engineered and independently SIL3 certified version for use in safety and \r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
*/\r
\r
-/* \r
+/*\r
Changes from V3.0.0\r
\r
Changes from V3.0.1\r
#define portDOUBLE portFLOAT\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned char\r
+#define portSTACK_TYPE uint8_t\r
#define portBASE_TYPE char\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef signed char BaseType_t;\r
+typedef unsigned char UBaseType_t;\r
+\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) ( 0xFFFF )\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) ( 0xFFFF )\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) ( 0xFFFFFFFF )\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) ( 0xFFFFFFFF )\r
#endif\r
\r
#define portBYTE_ALIGNMENT 1\r
/*-----------------------------------------------------------*/\r
\r
/*\r
- * Constant used for context switch macro when we require the interrupt \r
+ * Constant used for context switch macro when we require the interrupt\r
* enable state to be forced when the interrupted task is switched back in.\r
*/\r
#define portINTERRUPTS_FORCED (0x01)\r
\r
/*\r
- * Constant used for context switch macro when we require the interrupt \r
+ * Constant used for context switch macro when we require the interrupt\r
* enable state to be unchanged when the interrupted task is switched back in.\r
*/\r
#define portINTERRUPTS_UNCHANGED (0x00)\r
{ \\r
bGIE=0; \\r
} while(bGIE) // MicroChip recommends this check!\r
- \r
+\r
#define portENABLE_INTERRUPTS() \\r
do \\r
{ \\r
bGIE=1; \\r
} while(0)\r
\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/*\r
* Critical section macros.\r
*/\r
-extern unsigned portCHAR ucCriticalNesting;\r
+extern uint8_t ucCriticalNesting;\r
\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portCHAR ) 0 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( uint8_t ) 0 )\r
\r
#define portENTER_CRITICAL() \\r
do \\r
* portMINIMAL_STACK_SIZE. Some input to this calculation is\r
* compiletime determined, other input is port-defined (see port.c)\r
*/\r
-extern unsigned portSHORT usPortCALCULATE_MINIMAL_STACK_SIZE( void );\r
-extern unsigned portSHORT usCalcMinStackSize;\r
+extern uint16_t usPortCALCULATE_MINIMAL_STACK_SIZE( void );\r
+extern uint16_t usCalcMinStackSize;\r
\r
#define portMINIMAL_STACK_SIZE \\r
((usCalcMinStackSize == 0) \\r
* Macro's that pushes all the registers that make up the context of a task onto\r
* the stack, then saves the new top of stack into the TCB. TOSU and TBLPTRU\r
* are only saved/restored on devices with more than 64kB (32k Words) ROM.\r
- * \r
+ *\r
* The stackpointer is helt by WizC in FSR2 and points to the first free byte.\r
* WizC uses a "downgrowing" stack. There is no framepointer.\r
*\r
* We keep track of the interruptstatus using ucCriticalNesting. When this\r
* value equals zero, interrupts have to be enabled upon exit from the\r
* portRESTORE_CONTEXT macro.\r
- * \r
- * If this is called from an ISR then the interrupt enable bits must have been \r
+ *\r
+ * If this is called from an ISR then the interrupt enable bits must have been\r
* set for the ISR to ever get called. Therefore we want to save\r
* ucCriticalNesting with value zero. This means the interrupts will again be\r
* re-enabled when the interrupted task is switched back in.\r
\r
/*-----------------------------------------------------------*/\r
\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
\r
/*-----------------------------------------------------------*/\r
\r