-//*****************************************************************************\r
+// *****************************************************************************\r
// +--+\r
// | ++----+\r
// +-++ |\r
// | +--+--+\r
// +----+ Copyright (c) 2011-12 Code Red Technologies Ltd.\r
//\r
-// Microcontroller Startup code for use with Red Suite\r
+// LPC43xx Microcontroller Startup code for use with Red Suite\r
//\r
-// Version : 120126\r
+// Version : 120430\r
//\r
// Software License Agreement\r
//\r
// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH\r
// CODE RED TECHNOLOGIES LTD.\r
//\r
-//*****************************************************************************\r
-#if defined (__cplusplus)\r
+// *****************************************************************************\r
+\r
+#include "stdint.h"\r
+\r
+#if defined(__cplusplus)\r
#ifdef __REDLIB__\r
#error Redlib does not support C++\r
#else\r
-//*****************************************************************************\r
+// *****************************************************************************\r
//\r
// The entry point for the C++ library startup\r
//\r
-//*****************************************************************************\r
+// *****************************************************************************\r
extern "C" {\r
- extern void __libc_init_array(void);\r
+extern void __libc_init_array(void);\r
+\r
}\r
#endif\r
#endif\r
\r
#define WEAK __attribute__ ((weak))\r
-#define ALIAS(f) __attribute__ ((weak, alias (#f)))\r
+#define ALIAS(f) __attribute__ ((weak, alias(# f)))\r
\r
// Code Red - if CMSIS is being used, then SystemInit() routine\r
// will be called by startup code rather than in application's main()\r
-#if defined (__USE_CMSIS)\r
-#include "LPC18xx.h"\r
-#endif\r
+extern void SystemInit(void);\r
\r
-//*****************************************************************************\r
-#if defined (__cplusplus)\r
+// *****************************************************************************\r
+#if defined(__cplusplus)\r
extern "C" {\r
#endif\r
\r
-#include <stdint.h>\r
-\r
-//*****************************************************************************\r
+// *****************************************************************************\r
//\r
// Forward declaration of the default handlers. These are aliased.\r
// When the application defines a handler (with the same name), this will\r
// automatically take precedence over these weak definitions\r
//\r
-//*****************************************************************************\r
- void ResetISR(void);\r
+// *****************************************************************************\r
+void ResetISR(void);\r
WEAK void NMI_Handler(void);\r
-WEAK void HardFault_Handler(void);// __attribute__((naked));\r
+WEAK void HardFault_Handler(void);\r
WEAK void MemManage_Handler(void);\r
WEAK void BusFault_Handler(void);\r
WEAK void UsageFault_Handler(void);\r
-WEAK void SVCall_Handler(void);\r
+WEAK void SVC_Handler(void);\r
WEAK void DebugMon_Handler(void);\r
WEAK void PendSV_Handler(void);\r
WEAK void SysTick_Handler(void);\r
//\r
//*****************************************************************************\r
void DAC_IRQHandler(void) ALIAS(IntDefaultHandler);\r
+void MX_CORE_IRQHandler(void) ALIAS(IntDefaultHandler);\r
void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLASHEEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);\r
void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);\r
void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler);\r
void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);\r
void ADC0_IRQHandler(void) ALIAS(IntDefaultHandler);\r
void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);\r
void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);\r
+void SPI_IRQHandler (void) ALIAS(IntDefaultHandler);\r
void ADC1_IRQHandler(void) ALIAS(IntDefaultHandler);\r
void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);\r
void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);\r
// The vector table.\r
// This relies on the linker script to place at correct location in memory.\r
//\r
-//*****************************************************************************\r
-extern void (* const g_pfnVectors[])(void);\r
+// *****************************************************************************\r
+extern void(*const g_pfnVectors[]) (void);\r
__attribute__ ((section(".isr_vector")))\r
-void (* const g_pfnVectors[])(void) = {\r
- // Core Level - CM3\r
- &_vStackTop, // The initial stack pointer\r
- ResetISR, // The reset handler\r
- NMI_Handler, // The NMI handler\r
- HardFault_Handler, // The hard fault handler\r
- MemManage_Handler, // The MPU fault handler\r
- BusFault_Handler, // The bus fault handler\r
- UsageFault_Handler, // The usage fault handler\r
- 0, // Reserved\r
- 0, // Reserved\r
- 0, // Reserved\r
- 0, // Reserved\r
- SVCall_Handler, // SVCall handler\r
- DebugMon_Handler, // Debug monitor handler\r
- 0, // Reserved\r
- PendSV_Handler, // The PendSV handler\r
- SysTick_Handler, // The SysTick handler\r
-\r
- // Chip Level - LPC18\r
- DAC_IRQHandler, // 16\r
- 0, // 17\r
- DMA_IRQHandler, // 18\r
- 0, // 19\r
- 0, // 20\r
- ETH_IRQHandler, // 21\r
- SDIO_IRQHandler, // 22\r
- LCD_IRQHandler, // 23\r
- USB0_IRQHandler, // 24\r
- USB1_IRQHandler, // 25\r
- SCT_IRQHandler, // 26\r
- RIT_IRQHandler, // 27\r
- TIMER0_IRQHandler, // 28\r
- TIMER1_IRQHandler, // 29\r
- TIMER2_IRQHandler, // 30\r
- TIMER3_IRQHandler, // 31\r
- MCPWM_IRQHandler, // 32\r
- ADC0_IRQHandler, // 33\r
- I2C0_IRQHandler, // 34\r
- I2C1_IRQHandler, // 35\r
- 0, // 36\r
- ADC1_IRQHandler, // 37\r
- SSP0_IRQHandler, // 38\r
- SSP1_IRQHandler, // 39\r
- UART0_IRQHandler, // 40\r
- UART1_IRQHandler, // 41\r
- UART2_IRQHandler, // 42\r
- UART3_IRQHandler, // 43\r
- I2S0_IRQHandler, // 44\r
- I2S1_IRQHandler, // 45\r
- SPIFI_IRQHandler, // 46\r
- SGPIO_IRQHandler, // 47\r
- GPIO0_IRQHandler, // 48\r
- GPIO1_IRQHandler, // 49\r
- GPIO2_IRQHandler, // 50\r
- GPIO3_IRQHandler, // 51\r
- GPIO4_IRQHandler, // 52\r
- GPIO5_IRQHandler, // 53\r
- GPIO6_IRQHandler, // 54\r
- GPIO7_IRQHandler, // 55\r
- GINT0_IRQHandler, // 56\r
- GINT1_IRQHandler, // 57\r
- EVRT_IRQHandler, // 58\r
- CAN1_IRQHandler, // 59\r
- 0, // 60\r
- 0, // 61\r
- ATIMER_IRQHandler, // 62\r
- RTC_IRQHandler, // 63\r
- 0, // 64\r
- WDT_IRQHandler, // 65\r
- 0, // 66\r
- CAN0_IRQHandler, // 67\r
- QEI_IRQHandler, // 68\r
+void(*const g_pfnVectors[]) (void) = {\r
+ // Core Level - CM4/CM3\r
+ &_vStackTop, // The initial stack pointer\r
+ ResetISR, // The reset handler\r
+ NMI_Handler, // The NMI handler\r
+ HardFault_Handler, // The hard fault handler\r
+ MemManage_Handler, // The MPU fault handler\r
+ BusFault_Handler, // The bus fault handler\r
+ UsageFault_Handler, // The usage fault handler\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ SVC_Handler, // SVCall handler\r
+ DebugMon_Handler, // Debug monitor handler\r
+ 0, // Reserved\r
+ PendSV_Handler, // The PendSV handler\r
+ SysTick_Handler, // The SysTick handler\r
+\r
+ // Chip Level - LPC18xx/43xx\r
+ DAC_IRQHandler, // 16 D/A Converter\r
+ MX_CORE_IRQHandler, // 17 CortexM4/M0 (LPC43XX ONLY)\r
+ DMA_IRQHandler, // 18 General Purpose DMA\r
+ 0, // 19 Reserved\r
+ FLASHEEPROM_IRQHandler, // 20 ORed flash Bank A, flash Bank B, EEPROM interrupts\r
+ ETH_IRQHandler, // 21 Ethernet\r
+ SDIO_IRQHandler, // 22 SD/MMC\r
+ LCD_IRQHandler, // 23 LCD\r
+ USB0_IRQHandler, // 24 USB0\r
+ USB1_IRQHandler, // 25 USB1\r
+ SCT_IRQHandler, // 26 State Configurable Timer\r
+ RIT_IRQHandler, // 27 Repetitive Interrupt Timer\r
+ TIMER0_IRQHandler, // 28 Timer0\r
+ TIMER1_IRQHandler, // 29 Timer 1\r
+ TIMER2_IRQHandler, // 30 Timer 2\r
+ TIMER3_IRQHandler, // 31 Timer 3\r
+ MCPWM_IRQHandler, // 32 Motor Control PWM\r
+ ADC0_IRQHandler, // 33 A/D Converter 0\r
+ I2C0_IRQHandler, // 34 I2C0\r
+ I2C1_IRQHandler, // 35 I2C1\r
+ SPI_IRQHandler, // 36 SPI (LPC43XX ONLY)\r
+ ADC1_IRQHandler, // 37 A/D Converter 1\r
+ SSP0_IRQHandler, // 38 SSP0 \r
+ SSP1_IRQHandler, // 39 SSP1\r
+ UART0_IRQHandler, // 40 UART0\r
+ UART1_IRQHandler, // 41 UART1\r
+ UART2_IRQHandler, // 42 UART2\r
+ UART3_IRQHandler, // 43 USRT3\r
+ I2S0_IRQHandler, // 44 I2S0\r
+ I2S1_IRQHandler, // 45 I2S1\r
+ SPIFI_IRQHandler, // 46 SPI Flash Interface\r
+ SGPIO_IRQHandler, // 47 SGPIO (LPC43XX ONLY)\r
+ GPIO0_IRQHandler, // 48 GPIO0\r
+ GPIO1_IRQHandler, // 49 GPIO1\r
+ GPIO2_IRQHandler, // 50 GPIO2\r
+ GPIO3_IRQHandler, // 51 GPIO3 \r
+ GPIO4_IRQHandler, // 52 GPIO4\r
+ GPIO5_IRQHandler, // 53 GPIO5\r
+ GPIO6_IRQHandler, // 54 GPIO6\r
+ GPIO7_IRQHandler, // 55 GPIO7\r
+ GINT0_IRQHandler, // 56 GINT0\r
+ GINT1_IRQHandler, // 57 GINT1\r
+ EVRT_IRQHandler, // 58 Event Router\r
+ CAN1_IRQHandler, // 59 C_CAN1\r
+ 0, // 60 Reserved\r
+ 0, // 61 Reserved \r
+ ATIMER_IRQHandler, // 62 ATIMER\r
+ RTC_IRQHandler, // 63 RTC\r
+ 0, // 64 Reserved\r
+ WDT_IRQHandler, // 65 WDT\r
+ 0, // 66 Reserved\r
+ CAN0_IRQHandler, // 67 C_CAN0\r
+ QEI_IRQHandler, // 68 QEI\r
};\r
\r
//*****************************************************************************\r
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