/******************************************************************************* \r
- * FreeRTOS+Trace v2.2.2 Recorder Library\r
- * Percepio AB, www.percepio.se\r
+ * FreeRTOS+Trace v2.3.0 Recorder Library\r
+ * Percepio AB, www.percepio.com\r
*\r
* trcPort.h\r
*\r
*\r
* FreeRTOS+Trace is available as Free Edition and in two premium editions.\r
* You may use the premium features during 30 days for evaluation.\r
- * Download FreeRTOS+Trace at http://www.percepio.se/index.php?page=downloads\r
+ * Download FreeRTOS+Trace at http://www.percepio.com/products/downloads/\r
*\r
* Copyright Percepio AB, 2012.\r
- * www.percepio.se\r
+ * www.percepio.com\r
******************************************************************************/\r
\r
#ifndef TRCPORT_H\r
#define TRCPORT_H\r
\r
-#include "trcBase.h"\r
-\r
/* If FreeRTOS Win32 port */\r
#ifdef WIN32\r
\r
******************************************************************************/\r
#define WIN32_PORT_SAVE_WHEN_STOPPED 1\r
#define WIN32_PORT_EXIT_WHEN_STOPPED 1\r
-\r
+#else\r
+ #define WIN32_PORT_SAVE_WHEN_STOPPED 0\r
+ #define WIN32_PORT_EXIT_WHEN_STOPPED 0\r
#endif\r
\r
#define DIRECTION_INCREMENTING 1\r
* count). The timing of the Win32 FreeRTOS build is not real-time, since it \r
* depends on the scheduling and tick rate of Windows, which is very slow.\r
*\r
- * Officially supported hardware specific ports included are:\r
+ * Officially supported hardware timer ports:\r
* - PORT_Atmel_AT91SAM7\r
+ * - PORT_Atmel_UC3A0\r
* - PORT_ARM_CortexM \r
* - PORT_Renesas_RX600\r
+ * - PORT_Microchip_dsPIC_AND_PIC24\r
*\r
* We also provide several "unofficial" hardware-specific ports. There have \r
* been developed by external contributors, and have not yet been verified \r
* - PORT_TEXAS_INSTRUMENTS_TMS570\r
* - PORT_TEXAS_INSTRUMENTS_MSP430\r
* - PORT_MICROCHIP_PIC32\r
- * - PORT_MICROCHIP_dsPIC_AND_PIC24\r
* - PORT_XILINX_PPC405\r
* - PORT_XILINX_PPC440\r
+ * - PORT_XILINX_MICROBLAZE\r
+ * - PORT_NXP_LPC210X\r
*\r
- ******************************************************************************/\r
-\r
-#define PORT_NOT_SET -1\r
-\r
-/* Officially supported ports */\r
-#define PORT_HWIndependent 0\r
-#define PORT_Win32 1\r
-#define PORT_Atmel_AT91SAM7 2\r
-#define PORT_ARM_CortexM 3\r
-#define PORT_Renesas_RX600 4\r
-\r
-/* Unofficial ports, provided by external developers and not yet verified */\r
-#define PORT_TEXAS_INSTRUMENTS_TMS570 6\r
-#define PORT_TEXAS_INSTRUMENTS_MSP430 7\r
-#define PORT_MICROCHIP_PIC32 8\r
-#define PORT_MICROCHIP_dsPIC_AND_PIC24 9\r
-#define PORT_XILINX_PPC405 10\r
-#define PORT_XILINX_PPC440 11\r
+ *****************************************************************************/\r
+\r
+#define PORT_NOT_SET -1\r
+\r
+/*** Officially supported hardware timer ports *******************************/\r
+#define PORT_HWIndependent 0\r
+#define PORT_Win32 1\r
+#define PORT_Atmel_AT91SAM7 2\r
+#define PORT_Atmel_UC3A0 3\r
+#define PORT_ARM_CortexM 4\r
+#define PORT_Renesas_RX600 5\r
+#define PORT_Microchip_dsPIC_AND_PIC24 6\r
+\r
+/*** Unofficial ports, provided by external developers, not yet verified *****/\r
+#define PORT_TEXAS_INSTRUMENTS_TMS570 7\r
+#define PORT_TEXAS_INSTRUMENTS_MSP430 8\r
+#define PORT_MICROCHIP_PIC32 9\r
+#define PORT_XILINX_PPC405 10\r
+#define PORT_XILINX_PPC440 11\r
+#define PORT_XILINX_MICROBLAZE 12\r
+#define PORT_NXP_LPC210X 13\r
\r
/*** Select your port here! **************************************************/\r
#define SELECTED_PORT PORT_Win32\r
/*****************************************************************************/\r
\r
+#if (SELECTED_PORT == PORT_NOT_SET) \r
+#error "You need to define SELECTED_PORT here!"\r
+#endif\r
+\r
/*******************************************************************************\r
* IRQ_PRIORITY_ORDER\r
*\r
* the vTraceStoreISRBegin and vTraceStoreISREnd routines.\r
*\r
* We provide this setting for some hardware architectures below:\r
- * - ARM Cortex M: 0 (lower irq priority values are more significant)\r
- * - Atmel AT91SAM7x: 1 (higher irq priority values are more significant)\r
- * - Renesas RX62N: 1 (higher irq priority values are more significant)\r
- * - Microchip PIC24: 0 (lower irq priority values are more significant)\r
- * - Microchip dsPIC: 0 (lower irq priority values are more significant)\r
- * - TI TMS570 (ARM Cortex R4F): 0 (lower irq priority values are more significant)\r
- * - Freescale HCS08: 0 (lower irq priority values are more significant)\r
- * - Freescale HCS12: 0 (lower irq priority values are more significant)\r
- * - Freescale ColdFire: 1 (higher irq priority values are more significant)\r
+ * - ARM Cortex M: 0 (lower irq priority values are more significant)\r
+ * - Atmel AT91SAM7x: 1 (higher irq priority values are more significant)\r
+ * - Atmel AVR32: 1 (higher irq priority values are more significant)\r
+ * - Renesas RX600: 1 (higher irq priority values are more significant)\r
+ * - Microchip PIC24: 0 (lower irq priority values are more significant)\r
+ * - Microchip dsPIC: 0 (lower irq priority values are more significant)\r
+ * - TI TMS570: 0 (lower irq priority values are more significant)\r
+ * - Freescale HCS08: 0 (lower irq priority values are more significant)\r
+ * - Freescale HCS12: 0 (lower irq priority values are more significant)\r
+ * - PowerPC 405: 0 (lower irq priority values are more significant)\r
+ * - PowerPC 440: 0 (lower irq priority values are more significant)\r
+ * - Freescale ColdFire: 1 (higher irq priority values are more significant)\r
+ * - NXP LPC210x: 0 (lower irq priority values are more significant)\r
+ * - MicroBlaze: 0 (lower irq priority values are more significant)\r
*\r
* If your chip is not on the above list, and you perhaps know this detail by \r
- * heart, please inform us by e-mail to support@percepio.se.\r
- ******************************************************************************/\r
-#define IRQ_PRIORITY_ORDER 0\r
-\r
-/*******************************************************************************\r
- * HWTC macros\r
- * \r
- * These four macros provides a hardware isolation layer, representing a \r
+ * heart, please inform us by e-mail to support@percepio.com.\r
+ *\r
+ ******************************************************************************\r
+ *\r
+ * HWTC Macros \r
+ *\r
+ * These four HWTC macros provides a hardware isolation layer representing a \r
* generic hardware timer/counter used for driving the operating system tick, \r
* such as the SysTick feature of ARM Cortex M3/M4, or the PIT of the Atmel \r
* AT91SAM7X.\r
* (where the SysTick runs at the core clock frequency), the "differential \r
* timestamping" used in the recorder will more frequently insert extra XTS \r
* events to store the timestamps, which increases the event buffer usage. \r
- * In such cases, to reduce the number of XTS events and thereby get a longer \r
+ * In such cases, to reduce the number of XTS events and thereby get longer \r
* traces, you use HWTC_DIVISOR to scale down the timestamps and frequency.\r
* Assuming a OS tick rate of 1 KHz, it is suggested to keep the effective timer\r
* frequency below 65 MHz to avoid an excessive amount of XTS events. Thus, a\r
* or the trace recorder library. Typically you should not need to change\r
* the code of uiTracePortGetTimeStamp if using the HWTC macros.\r
*\r
- * OFFER FROM PERCEPIO:\r
+ * FREE LICENSE OFFER FROM PERCEPIO\r
+ *\r
* For silicon companies and non-corporate FreeRTOS users (researchers, students,\r
- * hobbyists or early-phase startups) we have an attractive offer: \r
- * Provide a hardware timer port and get a FREE single-user licence for\r
- * FreeRTOS+Trace Professional Edition. Read more about this offer at \r
- * www.percepio.se or contact us directly at support@percepio.se.\r
+ * hobbyists or early-phase startups) we have the following offer: \r
+ * Provide a hardware port for our FreeRTOS recorder and get a FREE single-user\r
+ * license for FreeRTOS+Trace Professional Edition. Read more about this offer\r
+ * at www.percepio.com or contact us directly at support@percepio.com.\r
*\r
******************************************************************************/\r
\r
#if (SELECTED_PORT == PORT_Win32)\r
\r
- #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING\r
+ #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING\r
#define HWTC_COUNT (ulGetRunTimeCounterValue())\r
#define HWTC_PERIOD 0\r
#define HWTC_DIVISOR 1\r
- \r
+ \r
+ #define IRQ_PRIORITY_ORDER 1 // Please update according to your hardware...\r
+\r
#elif (SELECTED_PORT == PORT_HWIndependent)\r
\r
- #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING\r
+ #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING\r
#define HWTC_COUNT 0\r
#define HWTC_PERIOD 1\r
#define HWTC_DIVISOR 1\r
- \r
+\r
+ #define IRQ_PRIORITY_ORDER 1 // Please update according to your hardware...\r
+\r
#elif (SELECTED_PORT == PORT_Atmel_AT91SAM7)\r
\r
/* HWTC_PERIOD is hardcoded for AT91SAM7X256-EK Board (48 MHz)\r
- A more generic solution is to get the period from pxPIT->PITC_PIMR */\r
- \r
+ A more generic solution is to get the period from pxPIT->PITC_PIMR */\r
+ \r
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING\r
#define HWTC_COUNT (AT91C_BASE_PITC->PITC_PIIR & 0xFFFFF)\r
#define HWTC_PERIOD 2995 \r
#define HWTC_DIVISOR 1\r
\r
+ #define IRQ_PRIORITY_ORDER 1 // higher irq priority values are more significant\r
+\r
+#elif (SELECTED_PORT == PORT_Atmel_UC3A0) \r
+ \r
+ /* For Atmel AVR32 (AT32UC3A) */\r
+ \r
+ #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING\r
+ #define HWTC_COUNT sysreg_read(AVR32_COUNT)\r
+ #define HWTC_PERIOD ( configCPU_CLOCK_HZ / configTICK_RATE_HZ )\r
+ #define HWTC_DIVISOR 1 \r
+\r
+ #define IRQ_PRIORITY_ORDER 1 // higher irq priority values are more significant\r
+\r
#elif (SELECTED_PORT == PORT_ARM_CortexM)\r
\r
- /* For all chips using ARM Cortex M cores */\r
+ /* For all chips using ARM Cortex M cores */\r
\r
#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING\r
#define HWTC_COUNT (*((uint32_t*)0xE000E018))\r
#define HWTC_PERIOD ((*(uint32_t*)0xE000E014) + 1)\r
#define HWTC_DIVISOR 2\r
+ \r
+ #define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant\r
\r
-#elif (SELECTED_PORT == PORT_Renesas_RX600) \r
+#elif (SELECTED_PORT == PORT_Renesas_RX600) \r
\r
#include "iodefine.h"\r
\r
#define HWTC_PERIOD ((((configPERIPHERAL_CLOCK_HZ/configTICK_RATE_HZ)-1)/8))\r
#define HWTC_DIVISOR 1\r
\r
-#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_TMS570) /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */\r
+ #define IRQ_PRIORITY_ORDER 1 // higher irq priority values are more significant\r
+\r
+#elif (SELECTED_PORT == PORT_Microchip_dsPIC_AND_PIC24) \r
+\r
+ /* For Microchip PIC24 and dsPIC (16 bit) */\r
+\r
+ /* Note: The trace library was originally designed for 32-bit MCUs, and is slower\r
+ than intended on 16-bit MCUs. Storing an event on a PIC24 takes about 70 µs. \r
+ In comparison, 32-bit MCUs are often 10-20 times faster. If recording overhead \r
+ becomes a problem on PIC24, use the filters to exclude less interresting tasks \r
+ or system calls. */\r
+\r
+ #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING\r
+ #define HWTC_COUNT (TMR1)\r
+ #define HWTC_PERIOD (PR1+1)\r
+ #define HWTC_DIVISOR 1\r
+\r
+ #define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant\r
+\r
+#elif (SELECTED_PORT == PORT_NXP_LPC210X)\r
+ /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */\r
+ \r
+ /* Tested with LPC2106, but should work with most LPC21XX chips.\r
+ Assumption: prescaler is 1:1 (this setting is hardcoded in \r
+ FreeRTOS port for LPC21XX) */\r
+ \r
+ #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING\r
+ #define HWTC_COUNT *((uint32_t *)0xE0004008 )\r
+ #define HWTC_PERIOD ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) \r
+ #define HWTC_DIVISOR 1 \r
+\r
+ #define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant\r
+\r
+#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_TMS570)\r
+ /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */\r
\r
#define RTIFRC0 *((uint32_t *)0xFFFFFC10)\r
#define RTICOMP0 *((uint32_t *)0xFFFFFC50)\r
#define HWTC_PERIOD (RTIUDCP0)\r
#define HWTC_DIVISOR 1\r
\r
-#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_MSP430) \r
- /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */\r
+ #define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant\r
+\r
+#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_MSP430)\r
+ /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */\r
\r
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING\r
#define HWTC_COUNT (TA0R)\r
#define HWTC_PERIOD configCPU_CLOCKS_PER_TICK \r
#define HWTC_DIVISOR 1\r
\r
-#elif (SELECTED_PORT == PORT_MICROCHIP_PIC32) \r
- /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */\r
-\r
- #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING\r
- #define HWTC_COUNT (ReadTimer1()) /* Should be available in BSP */\r
- #define HWTC_PERIOD (ReadPeriod1()+1) /* Should be available in BSP */\r
- #define HWTC_DIVISOR 1\r
+ #define IRQ_PRIORITY_ORDER 1 // higher irq priority values are more significant\r
\r
-#elif (SELECTED_PORT == PORT_MICROCHIP_dsPIC_AND_PIC24) \r
- /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */\r
+#elif (SELECTED_PORT == PORT_MICROCHIP_PIC32)\r
+ /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */\r
\r
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING\r
- #define HWTC_COUNT (PR1)\r
- #define HWTC_PERIOD ((configCPU_CLOCK_HZ/portTIMER_PRESCALE)/configTICK_RATE_HZ)\r
+ #define HWTC_COUNT (ReadTimer1()) /* Should be available in BSP */\r
+ #define HWTC_PERIOD (ReadPeriod1()+1) /* Should be available in BSP */\r
#define HWTC_DIVISOR 1\r
\r
+ #define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant\r
+\r
#elif (SELECTED_PORT == PORT_XILINX_PPC405) \r
- /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */\r
+ /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */\r
\r
#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING\r
#define HWTC_COUNT mfspr( 0x3db)\r
#define HWTC_PERIOD ( configCPU_CLOCK_HZ / configTICK_RATE_HZ )\r
- #define HWTC_DIVISOR 1 \r
+ #define HWTC_DIVISOR 1\r
+\r
+ #define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant\r
\r
#elif (SELECTED_PORT == PORT_XILINX_PPC440) \r
- /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */\r
+ /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */\r
\r
- /* This should work with most PowerPC chips */\r
- \r
+ /* This should work with most PowerPC chips */\r
+ \r
#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING\r
#define HWTC_COUNT mfspr( 0x016 )\r
#define HWTC_PERIOD ( configCPU_CLOCK_HZ / configTICK_RATE_HZ )\r
#define HWTC_DIVISOR 1 \r
\r
-#else\r
- SELECTED_PORT is not set, or had unsupported value!\r
- (This is to intentionally cause a compiler error.) \r
-#endif\r
+ #define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant\r
+ \r
+#elif (SELECTED_PORT == PORT_XILINX_MICROBLAZE)\r
+ /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */\r
+\r
+ /* This should work with most Microblaze configurations\r
+ * This port is based on the official FreeRTOS Microlaze port and example application.\r
+ * It uses the AXI Timer 0 - the tick interrupt source.\r
+ * If an AXI Timer 0 peripheral is available on your hardware platform, no modifications are required.\r
+ */\r
+ #include "xtmrctr_l.h"\r
+\r
+ #define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING\r
+ #define HWTC_COUNT XTmrCtr_GetTimerCounterReg( XPAR_TMRCTR_0_BASEADDR, 0 )\r
+ #define HWTC_PERIOD ( configCPU_CLOCK_HZ / configTICK_RATE_HZ )\r
+ #define HWTC_DIVISOR 16\r
+\r
+ #define IRQ_PRIORITY_ORDER 0 // lower irq priority values are more significant\r
+\r
+#elif (SELECTED_PORT != PORT_NOT_SET)\r
+\r
+ #error "SELECTED_PORT had unsupported value!"\r
+ #define SELECTED_PORT PORT_NOT_SET\r
\r
-#ifndef HWTC_COUNT_DIRECTION\r
- HWTC_COUNT_DIRECTION is not set!\r
- (This is to intentionally cause a compiler error.) \r
-#endif \r
-\r
-#ifndef HWTC_COUNT\r
- HWTC_COUNT is not set!\r
- (This is to intentionally cause a compiler error.) \r
-#endif \r
-\r
-#ifndef HWTC_PERIOD\r
- HWTC_PERIOD is not set!\r
- (This is to intentionally cause a compiler error.) \r
-#endif \r
-\r
-#ifndef HWTC_DIVISOR\r
- HWTC_DIVISOR is not set!\r
- (This is to intentionally cause a compiler error.) \r
-#endif \r
-\r
-#ifndef IRQ_PRIORITY_ORDER\r
- IRQ_PRIORITY_ORDER is not set!\r
- (This is to intentionally cause a compiler error.) \r
-#endif \r
-\r
-#if (IRQ_PRIORITY_ORDER != 0) && (IRQ_PRIORITY_ORDER != 1)\r
- IRQ_PRIORITY_ORDER has bad value!\r
- (This is to intentionally cause a compiler error.) \r
-#endif \r
-\r
-#if (HWTC_DIVISOR < 1)\r
- HWTC_DIVISOR must be a non-zero positive value!\r
- (This is to intentionally cause a compiler error.) \r
-#endif \r
-\r
-#if ((IRQ_PRIORITY_ORDER != 0) && (IRQ_PRIORITY_ORDER != 1))\r
-IRQ_PRIORITY_ORDER not set!\r
-(This is to intentionally cause a compiler error.)\r
#endif\r
\r
+#if (SELECTED_PORT != PORT_NOT_SET)\r
+ \r
+ #ifndef HWTC_COUNT_DIRECTION\r
+ #error "HWTC_COUNT_DIRECTION is not set!"\r
+ #endif \r
+ \r
+ #ifndef HWTC_COUNT\r
+ #error "HWTC_COUNT is not set!" \r
+ #endif \r
+ \r
+ #ifndef HWTC_PERIOD\r
+ #error "HWTC_PERIOD is not set!"\r
+ #endif \r
+ \r
+ #ifndef HWTC_DIVISOR\r
+ #error "HWTC_DIVISOR is not set!" \r
+ #endif \r
+ \r
+ #ifndef IRQ_PRIORITY_ORDER\r
+ #error "IRQ_PRIORITY_ORDER is not set!"\r
+ #elif (IRQ_PRIORITY_ORDER != 0) && (IRQ_PRIORITY_ORDER != 1)\r
+ #error "IRQ_PRIORITY_ORDER has bad value!"\r
+ #endif \r
+ \r
+ #if (HWTC_DIVISOR < 1)\r
+ #error "HWTC_DIVISOR must be a non-zero positive value!"\r
+ #endif \r
+\r
+#endif\r
/*******************************************************************************\r
* vTraceConsoleMessage\r
*\r
* This needs to be correctly defined to see status reports from the trace \r
* status monitor task (this is defined in trcUser.c).\r
******************************************************************************/ \r
-#define vTraceConsoleMessage printf\r
+#if (SELECTED_PORT == PORT_Atmel_AT91SAM7)\r
+/* Port specific includes */\r
+#include "console.h"\r
+#endif\r
+\r
+#define vTraceConsoleMessage(x)\r
\r
/*******************************************************************************\r
* uiTracePortGetTimeStamp\r
* students, hobbyists or early-phase startups) we have an attractive offer: \r
* Provide a hardware timer port and get a FREE single-user licence for\r
* FreeRTOS+Trace Professional Edition. Read more about this offer at \r
- * www.percepio.se or contact us directly at support@percepio.se.\r
- ******************************************************************************/\r
-uint32_t uiTracePortGetTimeStamp(void);\r
-\r
-/*******************************************************************************\r
- * vTracePortSetFrequency\r
- *\r
- * Registers the frequency of the timer used. This is normally calculated \r
- * automatically from the HWTC macros, but the Win32 port requires a special \r
- * solution where the frequency can be set independently of the HWTC macros.\r
- * This is called from main in the Win32 demo program.\r
+ * www.percepio.com or contact us directly at support@percepio.com.\r
******************************************************************************/\r
-void vTracePortSetFrequency(uint32_t freq);\r
+void uiTracePortGetTimeStamp(uint32_t *puiTimestamp);\r
\r
/*******************************************************************************\r
* vTracePortEnd\r
projects / freertos / blobdiff