]> git.sur5r.net Git - u-boot/blobdiff - board/freescale/mpc8569mds/mpc8569mds.c
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host
[u-boot] / board / freescale / mpc8569mds / mpc8569mds.c
index 1e7526a1aeb57d3a62ef89167a4d5425a7857045..cc8873117ef7411fa9a67dd4176c35bc34e46a1a 100644 (file)
@@ -331,9 +331,9 @@ pci_init_board(void)
 
        pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
        hose = &pcie1_hose;
-       pcie_ep =  (host_agent == 0) || (host_agent == 2 ) || (host_agent == 3);
+       pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent);
        r = hose->regions;
-       pcie_configured  = io_sel >= 1;
+       pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
 
        if (pcie_configured && !(gur->devdisr & MPC85xx_DEVDISR_PCIE)){
                printf ("\n    PCIE connected to slot as %s (base address %x)",
@@ -347,9 +347,6 @@ pci_init_board(void)
                }
                printf ("\n");
 
-               /* inbound */
-               r += fsl_pci_setup_inbound_windows(r);
-
                /* outbound memory */
                pci_set_region(r++,
                                CONFIG_SYS_PCIE1_MEM_BUS,
@@ -367,10 +364,8 @@ pci_init_board(void)
                hose->region_count = r - hose->regions;
 
                hose->first_busno=first_free_busno;
-               pci_setup_indirect(hose, (int) &pci->cfg_addr,
-                                       (int) &pci->cfg_data);
 
-               fsl_pci_init(hose);
+               fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
                printf ("PCIE on bus %02x - %02x\n",
                                hose->first_busno,hose->last_busno);