mx6sabresd: Use VESA 1024x768 timings

[u-boot] / board / freescale / mx6sabresd / mx6sabresd.c

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 42f89ab2ab09c340b169cece8a34951cff46d033..727334a2279300d110210a7f8646822b242e82b3 100644 (file)
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -235,6 +235,11 @@ struct fsl_esdhc_cfg usdhc_cfg[3] = {
 #define USDHC2_CD_GPIO IMX_GPIO_NR(2, 2)
 #define USDHC3_CD_GPIO IMX_GPIO_NR(2, 0)
 
+int board_mmc_get_env_dev(int devno)
+{
+       return devno - 1;
+}
+
 int board_mmc_getcd(struct mmc *mmc)
 {
        struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
@@ -263,7 +268,7 @@ int board_mmc_init(bd_t *bis)
 
        /*
         * According to the board_mmc_init() the following map is done:
-        * (U-boot device node)    (Physical Port)
+        * (U-Boot device node)    (Physical Port)
         * mmc0                    SD2
         * mmc1                    SD3
         * mmc2                    eMMC
@@ -381,13 +386,13 @@ struct display_info_t const displays[] = {{
                .refresh        = 60,
                .xres           = 1024,
                .yres           = 768,
-               .pixclock       = 15385,
-               .left_margin    = 220,
-               .right_margin   = 40,
-               .upper_margin   = 21,
-               .lower_margin   = 7,
-               .hsync_len      = 60,
-               .vsync_len      = 10,
+               .pixclock       = 15384,
+               .left_margin    = 160,
+               .right_margin   = 24,
+               .upper_margin   = 29,
+               .lower_margin   = 3,
+               .hsync_len      = 136,
+               .vsync_len      = 6,
                .sync           = FB_SYNC_EXT,
                .vmode          = FB_VMODE_NONINTERLACED
 } }, {
@@ -401,13 +406,13 @@ struct display_info_t const displays[] = {{
                .refresh        = 60,
                .xres           = 1024,
                .yres           = 768,
-               .pixclock       = 15385,
-               .left_margin    = 220,
-               .right_margin   = 40,
-               .upper_margin   = 21,
-               .lower_margin   = 7,
-               .hsync_len      = 60,
-               .vsync_len      = 10,
+               .pixclock       = 15384,
+               .left_margin    = 160,
+               .right_margin   = 24,
+               .upper_margin   = 29,
+               .lower_margin   = 3,
+               .hsync_len      = 136,
+               .vsync_len      = 6,
                .sync           = FB_SYNC_EXT,
                .vmode          = FB_VMODE_NONINTERLACED
 } }, {