enable status register. This config option can be enabled in such
cases.
+config SYS_I2C_ASPEED
+ bool "Aspeed I2C Controller"
+ depends on DM_I2C && ARCH_ASPEED
+ help
+ Say yes here to select Aspeed I2C Host Controller. The driver
+ supports AST2500 and AST2400 controllers, but is very limited.
+ Only single master mode is supported and only byte-by-byte
+ synchronous reads and writes are supported, no Pool Buffers or DMA.
+
config SYS_I2C_INTEL
bool "Intel I2C/SMBUS driver"
depends on DM_I2C
config SYS_I2C_IMX_LPI2C
bool "NXP i.MX LPI2C driver"
- depends on ARCH_MX7ULP
help
Add support for the NXP i.MX LPI2C driver.
+config SYS_I2C_MESON
+ bool "Amlogic Meson I2C driver"
+ depends on DM_I2C && ARCH_MESON
+ help
+ Add support for the I2C controller available in Amlogic Meson
+ SoCs. The controller supports programmable bus speed including
+ standard (100kbits/s) and fast (400kbit/s) speed and allows the
+ software to define a flexible format of the bit streams. It has an
+ internal buffer holding up to 8 bytes for transfers and supports
+ both 7-bit and 10-bit addresses.
+
config SYS_I2C_MXC
bool "NXP i.MX I2C driver"
depends on MX6
channels and operating on standard mode upto 100 kbits/s and fast
mode upto 400 kbits/s.
+config SYS_I2C_OMAP24XX
+ bool "TI OMAP2+ I2C driver"
+ depends on ARCH_OMAP2PLUS
+ help
+ Add support for the OMAP2+ I2C driver.
+
+if SYS_I2C_OMAP24XX
+config SYS_OMAP24_I2C_SLAVE
+ int "I2C Slave addr channel 0"
+ default 1
+ help
+ OMAP24xx I2C Slave address channel 0
+
+config SYS_OMAP24_I2C_SPEED
+ int "I2C Slave channel 0 speed"
+ default 100000
+ help
+ OMAP24xx Slave speed channel 0
+endif
+
+config SYS_I2C_RCAR_IIC
+ bool "Renesas RCar Gen3 IIC driver"
+ depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
+ help
+ Support for Renesas RCar Gen3 IIC controller.
+
config SYS_I2C_ROCKCHIP
bool "Rockchip I2C driver"
depends on DM_I2C
help
Support for Samsung I2C controller as Samsung SoCs.
+config SYS_I2C_STM32F7
+ bool "STMicroelectronics STM32F7 I2C support"
+ depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
+ help
+ Enable this option to add support for STM32 I2C controller
+ introduced with STM32F7/H7 SoCs. This I2C controller supports :
+ _ Slave and master modes
+ _ Multimaster capability
+ _ Standard-mode (up to 100 kHz)
+ _ Fast-mode (up to 400 kHz)
+ _ Fast-mode Plus (up to 1 MHz)
+ _ 7-bit and 10-bit addressing mode
+ _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
+ _ All 7-bit addresses acknowledge mode
+ _ General call
+ _ Programmable setup and hold times
+ _ Easy to use event management
+ _ Optional clock stretching
+ _ Software reset
+
config SYS_I2C_UNIPHIER
bool "UniPhier I2C driver"
depends on ARCH_UNIPHIER && DM_I2C
by the BPMP, and can only be accessed by the main CPU via IPC
requests to the BPMP. This driver covers the latter case.
+config SYS_I2C_BUS_MAX
+ int "Max I2C busses"
+ depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
+ default 2 if TI816X
+ default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
+ default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
+ default 5 if OMAP54XX
+ help
+ Define the maximum number of available I2C buses.
+
+config SYS_I2C_ZYNQ
+ bool "Xilinx I2C driver"
+ depends on ARCH_ZYNQMP || ARCH_ZYNQ
+ help
+ Support for Xilinx I2C controller.
+
+config SYS_I2C_ZYNQ_SLAVE
+ hex "Set slave addr"
+ depends on SYS_I2C_ZYNQ
+ default 0
+ help
+ Set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr.
+
+config SYS_I2C_ZYNQ_SPEED
+ int "Set I2C speed"
+ depends on SYS_I2C_ZYNQ
+ default 100000
+ help
+ Set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting.
+
+config ZYNQ_I2C0
+ bool "Xilinx I2C0 controller"
+ depends on SYS_I2C_ZYNQ
+ help
+ Enable Xilinx I2C0 controller.
+
+config ZYNQ_I2C1
+ bool "Xilinx I2C1 controller"
+ depends on SYS_I2C_ZYNQ
+ help
+ Enable Xilinx I2C1 controller.
+
+config SYS_I2C_IHS
+ bool "gdsys IHS I2C driver"
+ depends on DM_I2C
+ help
+ Support for gdsys IHS I2C driver on FPGA bus.
+
source "drivers/i2c/muxes/Kconfig"
endmenu