+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2016 Freescale Semiconductors, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <fdtdec.h>
#include <i2c.h>
-DECLARE_GLOBAL_DATA_PTR;
#define LPI2C_FIFO_SIZE 4
#define LPI2C_TIMEOUT_MS 100
return 0;
}
-static int imx_lpci2c_check_busy_bus(struct udevice *bus)
+static int imx_lpci2c_check_busy_bus(const struct imx_lpi2c_reg *regs)
{
- struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
lpi2c_status_t result = LPI2C_SUCESS;
u32 status;
return result;
}
-static int imx_lpci2c_check_clear_error(struct udevice *bus)
+static int imx_lpci2c_check_clear_error(struct imx_lpi2c_reg *regs)
{
- struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
lpi2c_status_t result = LPI2C_SUCESS;
u32 val, status;
return result;
}
-static int bus_i2c_wait_for_tx_ready(struct udevice *bus)
+static int bus_i2c_wait_for_tx_ready(struct imx_lpi2c_reg *regs)
{
- struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
lpi2c_status_t result = LPI2C_SUCESS;
u32 txcount = 0;
ulong start_time = get_timer(0);
do {
txcount = LPI2C_MFSR_TXCOUNT(readl(®s->mfsr));
txcount = LPI2C_FIFO_SIZE - txcount;
- result = imx_lpci2c_check_clear_error(bus);
+ result = imx_lpci2c_check_clear_error(regs);
if (result) {
debug("i2c: wait for tx ready: result 0x%x\n", result);
return result;
return result;
}
-static int bus_i2c_send(struct udevice *bus, u8 *txbuf, int len)
+static int bus_i2c_send(struct imx_lpi2c_reg *regs, u8 *txbuf, int len)
{
- struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
lpi2c_status_t result = LPI2C_SUCESS;
/* empty tx */
return result;
while (len--) {
- result = bus_i2c_wait_for_tx_ready(bus);
+ result = bus_i2c_wait_for_tx_ready(regs);
if (result) {
debug("i2c: send wait fot tx ready: %d\n", result);
return result;
return result;
}
-static int bus_i2c_receive(struct udevice *bus, u8 *rxbuf, int len)
+static int bus_i2c_receive(struct imx_lpi2c_reg *regs, u8 *rxbuf, int len)
{
- struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
lpi2c_status_t result = LPI2C_SUCESS;
u32 val;
ulong start_time = get_timer(0);
if (!len)
return result;
- result = bus_i2c_wait_for_tx_ready(bus);
+ result = bus_i2c_wait_for_tx_ready(regs);
if (result) {
debug("i2c: receive wait fot tx ready: %d\n", result);
return result;
while (len--) {
do {
- result = imx_lpci2c_check_clear_error(bus);
+ result = imx_lpci2c_check_clear_error(regs);
if (result) {
- debug("i2c: receive check clear error: %d\n", result);
+ debug("i2c: receive check clear error: %d\n",
+ result);
return result;
}
if (get_timer(start_time) > LPI2C_TIMEOUT_MS) {
return result;
}
-static int bus_i2c_start(struct udevice *bus, u8 addr, u8 dir)
+static int bus_i2c_start(struct imx_lpi2c_reg *regs, u8 addr, u8 dir)
{
- struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
- lpi2c_status_t result = LPI2C_SUCESS;
+ lpi2c_status_t result;
u32 val;
- result = imx_lpci2c_check_busy_bus(bus);
+ result = imx_lpci2c_check_busy_bus(regs);
if (result) {
debug("i2c: start check busy bus: 0x%x\n", result);
return result;
val = readl(®s->mcfgr1) & ~LPI2C_MCFGR1_AUTOSTOP_MASK;
writel(val, ®s->mcfgr1);
/* wait tx fifo ready */
- result = bus_i2c_wait_for_tx_ready(bus);
+ result = bus_i2c_wait_for_tx_ready(regs);
if (result) {
debug("i2c: start wait for tx ready: 0x%x\n", result);
return result;
return result;
}
-static int bus_i2c_stop(struct udevice *bus)
+
+static int bus_i2c_stop(struct imx_lpi2c_reg *regs)
{
- struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
- lpi2c_status_t result = LPI2C_SUCESS;
+ lpi2c_status_t result;
u32 status;
- result = bus_i2c_wait_for_tx_ready(bus);
+ result = bus_i2c_wait_for_tx_ready(regs);
if (result) {
debug("i2c: stop wait for tx ready: 0x%x\n", result);
return result;
while (result == LPI2C_SUCESS) {
status = readl(®s->msr);
- result = imx_lpci2c_check_clear_error(bus);
+ result = imx_lpci2c_check_clear_error(regs);
/* stop detect flag */
if (status & LPI2C_MSR_SDF_MASK) {
/* clear stop flag */
return result;
}
-static int bus_i2c_read(struct udevice *bus, u32 chip, u8 *buf, int len)
+static int bus_i2c_read(struct imx_lpi2c_reg *regs, u32 chip, u8 *buf, int len)
{
- lpi2c_status_t result = LPI2C_SUCESS;
+ lpi2c_status_t result;
- result = bus_i2c_start(bus, chip, 1);
+ result = bus_i2c_start(regs, chip, 1);
if (result)
return result;
- result = bus_i2c_receive(bus, buf, len);
+ result = bus_i2c_receive(regs, buf, len);
if (result)
return result;
- result = bus_i2c_stop(bus);
+ result = bus_i2c_stop(regs);
if (result)
return result;
return result;
}
-static int bus_i2c_write(struct udevice *bus, u32 chip, u8 *buf, int len)
+static int bus_i2c_write(struct imx_lpi2c_reg *regs, u32 chip, u8 *buf, int len)
{
- lpi2c_status_t result = LPI2C_SUCESS;
+ lpi2c_status_t result;
- result = bus_i2c_start(bus, chip, 0);
+ result = bus_i2c_start(regs, chip, 0);
if (result)
return result;
- result = bus_i2c_send(bus, buf, len);
+ result = bus_i2c_send(regs, buf, len);
if (result)
return result;
- result = bus_i2c_stop(bus);
+ result = bus_i2c_stop(regs);
if (result)
return result;
static int bus_i2c_set_bus_speed(struct udevice *bus, int speed)
{
- struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
+ struct imx_lpi2c_reg *regs;
u32 val;
u32 preescale = 0, best_pre = 0, clkhi = 0;
u32 best_clkhi = 0, abs_error = 0, rate;
bool mode;
int i;
- clock_rate = imx_get_i2cclk(bus->seq + 4);
+ regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus);
+ clock_rate = imx_get_i2cclk(bus->seq);
if (!clock_rate)
return -EPERM;
static int bus_i2c_init(struct udevice *bus, int speed)
{
- struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
+ struct imx_lpi2c_reg *regs;
u32 val;
int ret;
+ regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus);
/* reset peripheral */
writel(LPI2C_MCR_RST_MASK, ®s->mcr);
writel(0x0, ®s->mcr);
static int imx_lpi2c_probe_chip(struct udevice *bus, u32 chip,
u32 chip_flags)
{
- lpi2c_status_t result = LPI2C_SUCESS;
+ struct imx_lpi2c_reg *regs;
+ lpi2c_status_t result;
- result = bus_i2c_start(bus, chip, 0);
+ regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus);
+ result = bus_i2c_start(regs, chip, 0);
if (result) {
- bus_i2c_stop(bus);
+ bus_i2c_stop(regs);
bus_i2c_init(bus, 100000);
return result;
}
- result = bus_i2c_stop(bus);
+ result = bus_i2c_stop(regs);
if (result) {
bus_i2c_init(bus, 100000);
return -result;
static int imx_lpi2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
{
+ struct imx_lpi2c_reg *regs;
int ret = 0;
+ regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus);
for (; nmsgs > 0; nmsgs--, msg++) {
debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
if (msg->flags & I2C_M_RD)
- ret = bus_i2c_read(bus, msg->addr, msg->buf,
- msg->len);
+ ret = bus_i2c_read(regs, msg->addr, msg->buf, msg->len);
else {
- ret = bus_i2c_write(bus, msg->addr, msg->buf,
+ ret = bus_i2c_write(regs, msg->addr, msg->buf,
msg->len);
if (ret)
break;
i2c_bus->driver_data = dev_get_driver_data(bus);
- addr = dev_get_addr(bus);
+ addr = devfdt_get_addr(bus);
if (addr == FDT_ADDR_T_NONE)
- return -ENODEV;
+ return -EINVAL;
i2c_bus->base = addr;
i2c_bus->index = bus->seq;
i2c_bus->bus = bus;
/* power up i2c resource */
- ret = init_i2c_power(bus->seq + 4);
+ ret = init_i2c_power(bus->seq);
if (ret) {
debug("init_i2c_power err = %d\n", ret);
return ret;
}
- /* Enable clk, only i2c4-7 can be handled by A7 core */
- ret = enable_i2c_clk(1, bus->seq + 4);
+ /* To i.MX7ULP, only i2c4-7 can be handled by A7 core */
+ ret = enable_i2c_clk(1, bus->seq);
if (ret < 0)
return ret;