#define MATSU_SD_INFO2 0x03c /* IRQ status 2 */
#define MATSU_SD_INFO2_ERR_ILA BIT(15) /* illegal access err */
#define MATSU_SD_INFO2_CBSY BIT(14) /* command busy */
+#define MATSU_SD_INFO2_SCLKDIVEN BIT(13) /* command setting reg ena */
#define MATSU_SD_INFO2_BWE BIT(9) /* write buffer ready */
#define MATSU_SD_INFO2_BRE BIT(8) /* read buffer ready */
#define MATSU_SD_INFO2_DAT0 BIT(7) /* SDDAT0 */
int matsu_sd_bind(struct udevice *dev);
int matsu_sd_probe(struct udevice *dev, u32 quirks);
+u32 matsu_sd_readl(struct matsu_sd_priv *priv, unsigned int reg);
+void matsu_sd_writel(struct matsu_sd_priv *priv,
+ u32 val, unsigned int reg);
+
#endif /* __MATSUSHITA_COMMON_H__ */