+// SPDX-License-Identifier: GPL-2.0+
/*
* PCI autoconfiguration library
*
* Author: Matt Porter <mporter@mvista.com>
*
* Copyright 2000 MontaVista Software Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <dm.h>
#include <errno.h>
#include <pci.h>
u8 header_type;
int rom_addr;
pci_addr_t bar_value;
- struct pci_region *bar_res;
+ struct pci_region *bar_res = NULL;
int found_mem64 = 0;
u16 class;
}
if (!enum_only && pciauto_region_allocate(bar_res, bar_size,
- &bar_value) == 0) {
+ &bar_value,
+ found_mem64) == 0) {
/* Write it out and update our limit */
dm_pci_write_config32(dev, bar, (u32)bar_value);
debug("PCI Autoconfig: ROM, size=%#x, ",
(unsigned int)bar_size);
if (pciauto_region_allocate(mem, bar_size,
- &bar_value) == 0) {
+ &bar_value,
+ false) == 0) {
dm_pci_write_config32(dev, rom_addr,
bar_value);
}
struct pci_region *pci_prefetch;
struct pci_region *pci_io;
u16 cmdstat, prefechable_64;
- /* The root controller has the region information */
- struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
+ struct udevice *ctlr = pci_get_controller(dev);
+ struct pci_controller *ctlr_hose = dev_get_uclass_priv(ctlr);
pci_mem = ctlr_hose->pci_mem;
pci_prefetch = ctlr_hose->pci_prefetch;
/* Configure bus number registers */
dm_pci_write_config8(dev, PCI_PRIMARY_BUS,
- PCI_BUS(dm_pci_get_bdf(dev)));
- dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus);
+ PCI_BUS(dm_pci_get_bdf(dev)) - ctlr->seq);
+ dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus - ctlr->seq);
dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, 0xff);
if (pci_mem) {
struct pci_region *pci_mem;
struct pci_region *pci_prefetch;
struct pci_region *pci_io;
-
- /* The root controller has the region information */
- struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
+ struct udevice *ctlr = pci_get_controller(dev);
+ struct pci_controller *ctlr_hose = dev_get_uclass_priv(ctlr);
pci_mem = ctlr_hose->pci_mem;
pci_prefetch = ctlr_hose->pci_prefetch;
pci_io = ctlr_hose->pci_io;
/* Configure bus number registers */
- dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus);
+ dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - ctlr->seq);
if (pci_mem) {
/* Round memory allocator to 1MB boundary */
unsigned int sub_bus = PCI_BUS(dm_pci_get_bdf(dev));
unsigned short class;
bool enum_only = false;
+ struct udevice *ctlr = pci_get_controller(dev);
+ struct pci_controller *ctlr_hose = dev_get_uclass_priv(ctlr);
int n;
#ifdef CONFIG_PCI_ENUM_ONLY
enum_only = true;
#endif
- /* The root controller has the region information */
- struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
pci_mem = ctlr_hose->pci_mem;
pci_prefetch = ctlr_hose->pci_prefetch;
case PCI_CLASS_PROCESSOR_POWERPC: /* an agent or end-point */
debug("PCI AutoConfig: Found PowerPC device\n");
+ /* fall through */
default:
dm_pciauto_setup_device(dev, 6, pci_mem, pci_prefetch, pci_io,