]> git.sur5r.net Git - u-boot/blobdiff - drivers/ram/stm32_sdram.c
reset: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET
[u-boot] / drivers / ram / stm32_sdram.c
index dc39f33d16a7745ccfedf571cac975bab2656b7c..f6cac8eb90bfd542f70b07862a1e6e07808befb4 100644 (file)
@@ -11,6 +11,8 @@
 #include <asm/io.h>
 
 #define MEM_MODE_MASK  GENMASK(2, 0)
+#define SWP_FMC_OFFSET 10
+#define SWP_FMC_MASK   GENMASK(SWP_FMC_OFFSET+1, SWP_FMC_OFFSET)
 #define NOT_FOUND      0xff
 
 struct stm32_fmc_regs {
@@ -256,27 +258,36 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
        struct ofnode_phandle_args args;
        u32 *syscfg_base;
        u32 mem_remap;
+       u32 swp_fmc;
        ofnode bank_node;
        char *bank_name;
        u8 bank = 0;
        int ret;
 
-       mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND);
-       if (mem_remap != NOT_FOUND) {
-               ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
+       ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
                                                 &args);
-               if (ret) {
-                       debug("%s: can't find syscon device (%d)\n", __func__,
-                             ret);
-                       return ret;
-               }
-
+       if (ret) {
+               dev_dbg(dev, "%s: can't find syscon device (%d)\n", __func__, ret);
+       } else {
                syscfg_base = (u32 *)ofnode_get_addr(args.node);
 
-               /* set memory mapping selection */
-               clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap);
-       } else {
-               debug("%s: cannot find st,mem_remap property\n", __func__);
+               mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND);
+               if (mem_remap != NOT_FOUND) {
+                       /* set memory mapping selection */
+                       clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap);
+               } else {
+                       dev_dbg(dev, "%s: cannot find st,mem_remap property\n", __func__);
+               }
+               
+               swp_fmc = dev_read_u32_default(dev, "st,swp_fmc", NOT_FOUND);
+               if (swp_fmc != NOT_FOUND) {
+                       /* set fmc swapping selection */
+                       clrsetbits_le32(syscfg_base, SWP_FMC_MASK, swp_fmc << SWP_FMC_OFFSET);
+               } else {
+                       dev_dbg(dev, "%s: cannot find st,swp_fmc property\n", __func__);
+               }
+
+               dev_dbg(dev, "syscfg %x = %x\n", (u32)syscfg_base, *syscfg_base);
        }
 
        dev_for_each_subnode(bank_node, dev) {