unsigned long bi_sramstart; /* start of SRAM memory */
unsigned long bi_sramsize; /* size of SRAM memory */
#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \
- || defined(CONFIG_E500)
+ || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
unsigned long bi_immr_base; /* base of IMMR register */
#endif
#if defined(CONFIG_MPC5xxx)
unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
unsigned long bi_vco; /* VCO Out from PLL, in MHz */
#endif
+#if defined(CONFIG_MPC512X)
+ unsigned long bi_ipsfreq; /* IPS Bus Freq, in MHz */
+#endif /* CONFIG_MPC512X */
#if defined(CONFIG_MPC5xxx)
unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
defined(CONFIG_405GP) || \
defined(CONFIG_405CR) || \
defined(CONFIG_405EP) || \
+ defined(CONFIG_405EZ) || \
+ defined(CONFIG_405EX) || \
defined(CONFIG_440)
unsigned char bi_s_version[4]; /* Version of this structure */
unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */
unsigned char bi_enet3addr[6];
#endif
-#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined (CONFIG_440GX) || \
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
+ defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \
defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
- defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+ defined(CONFIG_460EX) || defined(CONFIG_460GT)
unsigned int bi_opbfreq; /* OPB clock in Hz */
int bi_iic_fast[2]; /* Use fast i2c mode */
#endif
unsigned char bi_sernum[8];
#endif
#if defined(CONFIG_4xx)
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || \
+ defined(CONFIG_460EX) || defined(CONFIG_460GT)
int bi_phynum[4]; /* Determines phy mapping */
int bi_phymode[4]; /* Determines phy mode */
#elif defined(CONFIG_405EP) || defined(CONFIG_440)