#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
+#define CONFIG_E1000 1 /* Defind e1000 pci Ethernet card*/
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
#define PIXIS_VCFGEN0 0x12 /* VELA Config Enable 0 */
#define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */
#define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */
+#define PIXIS_VBOOT_FMAP 0x80 /* VBOOT - CFG_FLASHMAP */
+#define PIXIS_VBOOT_FBANK 0x40 /* VBOOT - CFG_FLASHBANK */
#define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */
#define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */
#define PIXIS_VCLKH 0x19 /* VELA VCLKH register */
#define CONFIG_SYS_PCI1_MEM_BUS 0xc0000000
#define CONFIG_SYS_PCI1_MEM_PHYS 0xc0000000
#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */
+#define CONFIG_SYS_PCI1_IO_VIRT 0xe1000000
#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
#define CONFIG_SYS_PCI1_IO_PHYS 0xe1000000
#define CONFIG_SYS_PCI1_IO_SIZE 0x00010000 /* 64k */
#define CONFIG_SYS_PCIE2_MEM_BUS 0x80000000
#define CONFIG_SYS_PCIE2_MEM_PHYS 0x80000000
#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */
+#define CONFIG_SYS_PCIE2_IO_VIRT 0xe1010000
#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
#define CONFIG_SYS_PCIE2_IO_PHYS 0xe1010000
#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */
#define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000
#define CONFIG_SYS_PCIE1_MEM_PHYS 0xa0000000
#define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 /* 256M */
+#define CONFIG_SYS_PCIE1_IO_VIRT 0xe1020000
#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
#define CONFIG_SYS_PCIE1_IO_PHYS 0xe1020000
#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
#define CONFIG_SYS_PCIE3_MEM_BUS 0xb0000000
#define CONFIG_SYS_PCIE3_MEM_PHYS 0xb0000000
#define CONFIG_SYS_PCIE3_MEM_SIZE 0x00100000 /* 1M */
+#define CONFIG_SYS_PCIE3_IO_VIRT 0xb0100000 /* reuse mem LAW */
#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
#define CONFIG_SYS_PCIE3_IO_PHYS 0xb0100000 /* reuse mem LAW */
#define CONFIG_SYS_PCIE3_IO_SIZE 0x00100000 /* 1M */
#if defined(CONFIG_PCI)
/*PCIE video card used*/
-#define VIDEO_IO_OFFSET CONFIG_SYS_PCIE2_IO_PHYS
+#define VIDEO_IO_OFFSET CONFIG_SYS_PCIE2_IO_VIRT
/*PCI video card used*/
-/*#define VIDEO_IO_OFFSET CONFIG_SYS_PCI1_IO_PHYS*/
+/*#define VIDEO_IO_OFFSET CONFIG_SYS_PCI1_IO_VIRT*/
/* video */
#define CONFIG_VIDEO
#undef CONFIG_TULIP
#define CONFIG_RTL8139
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x) (x)
-#define _IO_BASE 0x00000000
-#endif
-
#ifndef CONFIG_PCI_PNP
#define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BUS
#define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_IO_BUS
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
- #define CONFIG_CMD_BEDBUG
#define CONFIG_CMD_NET
#define CONFIG_CMD_SCSI
#define CONFIG_CMD_EXT2
/*
* For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
+ * have to be in the first 16 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
+#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
/*
* Internal Definitions