ARM: socfpga: Adding clock frequency info for U-Boot

[u-boot] / include / configs / ds414.h

diff --git a/include/configs/ds414.h b/include/configs/ds414.h
index dd0cadd048452b1070a42d9feeca68aae5fa576e..5b444542f4e9d12b0fbc9c1ce9e0b42fcb192f6f 100644 (file)
--- a/include/configs/ds414.h
+++ b/include/configs/ds414.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef _CONFIG_SYNOLOGY_DS414_H
@@ -10,7 +9,6 @@
 /*
  * High Level Configuration Options (easy to change)
  */
-#define CONFIG_DISPLAY_BOARDINFO_LATE
 
 /*
  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
@@ -39,12 +37,8 @@
 #define CONFIG_ENV_SIZE                        (64 << 10) /* 64KiB */
 #define CONFIG_ENV_SECT_SIZE           (64 << 10) /* 64KiB sectors */
 
-#define CONFIG_PHY_MARVELL             /* there is a marvell phy */
-#define CONFIG_PHY_ADDR                        { 0x1, 0x0 }
 #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII
 
-#define CONFIG_SYS_ALT_MEMTEST
-
 /* PCIe support */
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_PCI_MVEBU
@@ -90,7 +84,6 @@
 
 /* SPL */
 /* Defines for SPL */
-#define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE           0x40004030
 #define CONFIG_SPL_MAX_SIZE            ((128 << 10) - 0x4030)
 
@@ -105,7 +98,6 @@
 #define CONFIG_SPL_BOOTROM_SAVE                (CONFIG_SPL_STACK + 4)
 
 /* SPL related SPI defines */
-#define CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x24000
 
 /* DS414 bus width is 32bits */