#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xf0
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x500
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_SPL_TEXT_BASE 0x10000000
#define CONFIG_SPL_MAX_SIZE 0x1a000
#define CONFIG_SPL_STACK 0x1001d000
#endif
/* I2C */
-#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1
#endif
/* Command line configuration */
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ENV
-#define CONFIG_CMD_PING
+#define CONFIG_MENU
+#define CONFIG_CMD_PXE
/* MMC */
#define CONFIG_MMC
#ifdef CONFIG_MMC
-#define CONFIG_CMD_MMC
-#define CONFIG_CMD_FAT
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_GENERIC_MMC
/* DSPI */
#define CONFIG_FSL_DSPI
#ifdef CONFIG_FSL_DSPI
-#define CONFIG_CMD_SF
#define CONFIG_DM_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO /* cs0 */
#define CONFIG_SPI_FLASH_SST /* cs1 */
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
+#define MTDPARTS_DEFAULT "mtdparts=spi0.0:1m(uboot)," \
+ "5m(kernel),1m(dtb),9m(file_system)"
+#else
+#define MTDPARTS_DEFAULT "mtdparts=60000000.nor:1m(nor_bank0_rcw)," \
+ "1m(nor_bank0_uboot),1m(nor_bank0_uboot_env)," \
+ "1m(nor_bank0_fman_uconde),40m(nor_bank0_fit)," \
+ "1m(nor_bank4_rcw),1m(nor_bank4_uboot)," \
+ "1m(nor_bank4_uboot_env),1m(nor_bank4_fman_ucode)," \
+ "40m(nor_bank4_fit);7e800000.flash:" \
+ "1m(nand_uboot),1m(nand_uboot_env)," \
+ "20m(nand_fit);spi0.0:1m(uboot)," \
+ "5m(kernel),1m(dtb),9m(file_system)"
+#endif
+
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
"loadaddr=0x80100000\0" \
- "kernel_addr=0x100000\0" \
- "ramdisk_addr=0x800000\0" \
- "ramdisk_size=0x2000000\0" \
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
"kernel_start=0x61100000\0" \
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
- "console=ttyAMA0,38400n8\0"
+ "console=ttyS0,115200\0" \
+ "mtdparts=" MTDPARTS_DEFAULT "\0"
#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
- "earlycon=uart8250,mmio,0x21c0500"
+ "earlycon=uart8250,mmio,0x21c0500 " \
+ MTDPARTS_DEFAULT
+
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
+#define CONFIG_BOOTCOMMAND "sf probe && sf read $kernel_load " \
+ "e0000 f00000 && bootm $kernel_load"
+#else
#define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \
"$kernel_size && bootm $kernel_load"
-#define CONFIG_BOOTDELAY 10
+#endif
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING 1