/* Status Register */
#define DWMCI_BUSY (1 << 9)
-#define DWMCI_FIFO_MASK 0x1ff
+#define DWMCI_FIFO_MASK 0x1fff
#define DWMCI_FIFO_SHIFT 17
/* FIFOTH Register */
* See rockchip_dw_mmc.c for an example.
*
* @cfg: Configuration structure to fill in (generally &plat->mmc)
- * @name: Device name (normally dev->name)
- * @buswidth: Bus width (in bits, such as 4 or 8)
- * @caps: Host capabilities (MMC_MODE_...)
+ * @host: DWMMC host
* @max_clk: Maximum supported clock speed in HZ (e.g. 150000000)
* @min_clk: Minimum supported clock speed in HZ (e.g. 400000)
*/
-void dwmci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth,
- uint caps, u32 max_clk, u32 min_clk);
+void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host,
+ u32 max_clk, u32 min_clk);
/**
* dwmci_bind() - Set up a new MMC block device
int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk);
#endif /* !CONFIG_BLK */
-#ifdef CONFIG_DM_MMC_OPS
+#ifdef CONFIG_DM_MMC
/* Export the operations to drivers */
int dwmci_probe(struct udevice *dev);
extern const struct dm_mmc_ops dm_dwmci_ops;