+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2010
* Stefano Babic, DENX Software Engineering, sbabic@denx.de.
*
* (C) Copyright 2009 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
*/
#ifndef __FSL_PMIC_H__
/* MC34708 Definitions */
#define SWx_VOLT_MASK_MC34708 0x3F
+#define SWx_1_110V_MC34708 0x24
#define SWx_1_250V_MC34708 0x30
#define SWx_1_300V_MC34708 0x34
#define TIMER_MASK_MC34708 0x300
#define SWBST_CTRL 31
#define SWBST_AUTO 0x8
+#define MC34708_REG_SW12_OPMODE 28
+
+#define MC34708_SW1AMODE_MASK 0x00000f
+#define MC34708_SW1AMHMODE 0x000010
+#define MC34708_SW1AUOMODE 0x000020
+#define MC34708_SW1DVSSPEED 0x0000c0
+#define MC34708_SW2MODE_MASK 0x03c000
+#define MC34708_SW2MHMODE 0x040000
+#define MC34708_SW2UOMODE 0x080000
+#define MC34708_SW2DVSSPEED 0x300000
+#define MC34708_PLLEN 0x400000
+#define MC34708_PLLX 0x800000
+
+#define MC34708_REG_SW345_OPMODE 29
+
+#define MC34708_SW3MODE_MASK 0x00000f
+#define MC34708_SW3MHMODE 0x000010
+#define MC34708_SW3UOMODE 0x000020
+#define MC34708_SW4AMODE_MASK 0x0003c0
+#define MC34708_SW4AMHMODE 0x000400
+#define MC34708_SW4AUOMODE 0x000800
+#define MC34708_SW4BMODE_MASK 0x00f000
+#define MC34708_SW4BMHMODE 0x010000
+#define MC34708_SW4BUOMODE 0x020000
+#define MC34708_SW5MODE_MASK 0x3c0000
+#define MC34708_SW5MHMODE 0x400000
+#define MC34708_SW5UOMODE 0x800000
+
+#define SW_MODE_OFFOFF 0x00
+#define SW_MODE_PWMOFF 0x01
+#define SW_MODE_PFMOFF 0x03
+#define SW_MODE_APSOFF 0x04
+#define SW_MODE_PWMPWM 0x05
+#define SW_MODE_PWMAPS 0x06
+#define SW_MODE_APSAPS 0x08
+#define SW_MODE_APSPFM 0x0c
+#define SW_MODE_PWMPFM 0x0d
+#define SW_MODE_PFMPFM 0x0f
+
+#define MC34708_TRANSFER_SIZE 3
#endif