* will not allocate storage for arrays of size 0
*/
+#include <linux/types.h>
+
+#ifdef CONFIG_DM_SERIAL
+/*
+ * For driver model we always use one byte per register, and sort out the
+ * differences in the driver
+ */
+#define CONFIG_SYS_NS16550_REG_SIZE (-1)
+#endif
+
#if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0)
#error "Please define NS16550 registers size."
+#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_DM_SERIAL)
+#define UART_REG(x) u32 x
#elif (CONFIG_SYS_NS16550_REG_SIZE > 0)
#define UART_REG(x) \
unsigned char prepad_##x[CONFIG_SYS_NS16550_REG_SIZE - 1]; \
unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1];
#endif
+/**
+ * struct ns16550_platdata - information about a NS16550 port
+ *
+ * @base: Base register address
+ * @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...)
+ * @clock: UART base clock speed in Hz
+ *
+ * @buf: Pointer to the RX interrupt buffer
+ * @rd_ptr: Read pointer in the RX interrupt buffer
+ * @wr_ptr: Write pointer in the RX interrupt buffer
+ */
+struct ns16550_platdata {
+ unsigned long base;
+ int reg_shift;
+ int clock;
+ int reg_offset;
+ u32 fcr;
+
+ int irq;
+
+ char *buf;
+ int rd_ptr;
+ int wr_ptr;
+};
+
+struct udevice;
+
struct NS16550 {
UART_REG(rbr); /* 0 */
UART_REG(ier); /* 1 */
UART_REG(lsr); /* 5 */
UART_REG(msr); /* 6 */
UART_REG(spr); /* 7 */
+#ifdef CONFIG_SOC_DA8XX
+ UART_REG(reg8); /* 8 */
+ UART_REG(reg9); /* 9 */
+ UART_REG(revid1); /* A */
+ UART_REG(revid2); /* B */
+ UART_REG(pwr_mgmt); /* C */
+ UART_REG(mdr1); /* D */
+#else
UART_REG(mdr1); /* 8 */
UART_REG(reg9); /* 9 */
UART_REG(regA); /* A */
UART_REG(uasr); /* F */
UART_REG(scr); /* 10*/
UART_REG(ssr); /* 11*/
- UART_REG(reg12); /* 12*/
- UART_REG(osc_12m_sel); /* 13*/
+#endif
+#ifdef CONFIG_DM_SERIAL
+ struct ns16550_platdata *plat;
+#endif
};
#define thr rbr
#define dll rbr
#define dlm ier
-typedef volatile struct NS16550 *NS16550_t;
+typedef struct NS16550 *NS16550_t;
/*
* These are the definitions for the FIFO Control Register
*/
-#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */
+#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */
#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */
#define UART_FCR_RXSR 0x02 /* Receiver soft reset */
#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */
+/* Ingenic JZ47xx specific UART-enable bit. */
+#define UART_FCR_UME 0x10
+
+/* Clear & enable FIFOs */
+#define UART_FCR_DEFVAL (UART_FCR_FIFO_EN | \
+ UART_FCR_RXSR | \
+ UART_FCR_TXSR)
+
/*
* These are the definitions for the Modem Control Register
*/
#define UART_MCR_OUT1 0x04 /* Out 1 */
#define UART_MCR_OUT2 0x08 /* Out 2 */
#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */
+#define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS */
#define UART_MCR_DMA_EN 0x04
#define UART_MCR_TX_DFR 0x08
#define UART_LCR_WLS_6 0x01 /* 6 bit character length */
#define UART_LCR_WLS_7 0x02 /* 7 bit character length */
#define UART_LCR_WLS_8 0x03 /* 8 bit character length */
-#define UART_LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */
+#define UART_LCR_STB 0x04 /* # stop Bits, off=1, on=1.5 or 2) */
#define UART_LCR_PEN 0x08 /* Parity eneble */
#define UART_LCR_EPS 0x10 /* Even Parity Select */
#define UART_LCR_STKP 0x20 /* Stick Parity */
#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */
#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
-
-#ifdef CONFIG_OMAP1510
-#define OSC_12M_SEL 0x01 /* selects 6.5 * current clk div */
-#endif
-
/* useful defaults for LCR */
#define UART_LCR_8N1 0x03
-void NS16550_init (NS16550_t com_port, int baud_divisor);
-void NS16550_putc (NS16550_t com_port, char c);
-char NS16550_getc (NS16550_t com_port);
-int NS16550_tstc (NS16550_t com_port);
-void NS16550_reinit (NS16550_t com_port, int baud_divisor);
+void NS16550_init(NS16550_t com_port, int baud_divisor);
+void NS16550_putc(NS16550_t com_port, char c);
+char NS16550_getc(NS16550_t com_port);
+int NS16550_tstc(NS16550_t com_port);
+void NS16550_reinit(NS16550_t com_port, int baud_divisor);
+
+/**
+ * ns16550_calc_divisor() - calculate the divisor given clock and baud rate
+ *
+ * Given the UART input clock and required baudrate, calculate the divisor
+ * that should be used.
+ *
+ * @port: UART port
+ * @clock: UART input clock speed in Hz
+ * @baudrate: Required baud rate
+ * @return baud rate divisor that should be used
+ */
+int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate);
+
+/**
+ * ns16550_serial_ofdata_to_platdata() - convert DT to platform data
+ *
+ * Decode a device tree node for an ns16550 device. This includes the
+ * register base address and register shift properties. The caller must set
+ * up the clock frequency.
+ *
+ * @dev: dev to decode platform data for
+ * @return: 0 if OK, -EINVAL on error
+ */
+int ns16550_serial_ofdata_to_platdata(struct udevice *dev);
+
+/**
+ * ns16550_serial_probe() - probe a serial port
+ *
+ * This sets up the serial port ready for use, except for the baud rate
+ * @return 0, or -ve on error
+ */
+int ns16550_serial_probe(struct udevice *dev);
+
+/**
+ * struct ns16550_serial_ops - ns16550 serial operations
+ *
+ * These should be used by the client driver for the driver's 'ops' member
+ */
+extern const struct dm_serial_ops ns16550_serial_ops;