X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=inline;f=drivers%2Fblock%2Fsym53c8xx.c;h=564aa9838b429f69aa4cd1d4f52031326c446e60;hb=82c4c6452604546a022c4cbb90cd7162c04557d2;hp=0c60bf80e5d32975ddd98bf463438d8c712dfba2;hpb=50bd0057ba8fceeb48533f8b1a652ccd0e170838;p=u-boot

diff --git a/drivers/block/sym53c8xx.c b/drivers/block/sym53c8xx.c
index 0c60bf80e5..564aa9838b 100644
--- a/drivers/block/sym53c8xx.c
+++ b/drivers/block/sym53c8xx.c
@@ -453,11 +453,9 @@ void scsi_int_enable(void)
 
 void scsi_write_dsp(unsigned long start)
 {
-	unsigned long val;
 #ifdef SCSI_SINGLE_STEP
 	unsigned char t;
 #endif
-	val = start;
 	out32r(scsi_mem_addr + DSP,start);
 #ifdef SCSI_SINGLE_STEP
 	t=scsi_read_byte(DCNTL);
@@ -836,10 +834,10 @@ void scsi_chip_init(void)
 	scsi_write_byte(SCNTL0,0xC0); /* full arbitration no start, no message, parity disabled, master */
 	scsi_write_byte(SCNTL1,0x00);
 	scsi_write_byte(SCNTL2,0x00);
-#ifndef CONFIG_SYS_SCSI_SYM53C8XX_CCF    /* config value for none 40 mhz clocks */
+#ifndef CONFIG_SYS_SCSI_SYM53C8XX_CCF    /* config value for none 40 MHz clocks */
 	scsi_write_byte(SCNTL3,0x13); /* synchronous clock 40/4=10MHz, asynchronous 40MHz */
 #else
-	scsi_write_byte(SCNTL3,CONFIG_SYS_SCSI_SYM53C8XX_CCF); /* config value for none 40 mhz clocks */
+	scsi_write_byte(SCNTL3,CONFIG_SYS_SCSI_SYM53C8XX_CCF); /* config value for none 40 MHz clocks */
 #endif
 	scsi_write_byte(SCID,0x47); /* ID=7, enable reselection */
 	scsi_write_byte(SXFER,0x00); /* synchronous transfer period 10MHz, asynchronous */